FEDL610Q419-05
Issue Date: July, 25, 2014
ML610Q419/ML610Q419C
8-bit Microcontroller with a Built-in LCD driver
GENERAL DESCRIPTION
This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as synchronous serial port,
UART, I2C bus interface (master), melody driver, battery level detect circuit, RC oscillation type A/D converter, and LCD
driver, are incorporated around 8-bit CPU nX-U8/100.
The CPU nX-U8/100 is capable of efficient instruction execution in 1-instruction 1-clock mode by 3-stage pipe line architecture
parallel procesing. The Flash ROM that is installed as program memory achieves low-voltage low-power consumption operation
(read operation) equivalent to mask ROM and is most suitable for battery-driven applications.
The on-chip debug function that is installed enables program debugging and programming.
FEATURES
•
CPU
−
8-bit RISC CPU (CPU name: nX-U8/100)
−
Instruction system: 16-bit instructions
−
Instruction set:
Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit
manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic
shift, and so on
−
On-Chip debug function
−
Minimum instruction execution time
30.5
µs
(@32.768 kHz system clock)
0.24 4µs (@4.096 MHz system clock)
•
Internal memory
−
Internal 64KByte Flash ROM (32K×16 bits) (including unusable 1KByte TEST area)
−
Internal 4KByte Data Flash (2K×16 bits)
−
Internal 2KByte Data RAM (2048×8 bits), 240×9bit Display Allocation RAM
•
Interrupt controller
−
1 non-maskable interrupt sources (Internal source: 1)
−
21 maskable interrupt sources (Internal sources: 16, External sources: 5)
•
Time base counter
−
Low-speed time base counter
×1
channel
Frequency compensation (Compensation range: Approx.
−488ppm
to +488ppm. Compensation accuracy: Approx.
0.48ppm)
−
High-speed time base counter
×1
channel
•
Watchdog timer
−
Non-maskable interrupt and reset
−
Free running
−
Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s)
•
Timers
−
8 bits
×
4 channels (Timer0-3: 16-bit x 2 configuration available by using Timer0-1 or Timer2-3)
−
Clock frequency measurement mode (in one channel of 16-bit configuration using Timer2-3)
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FEDL610Q419-05
ML610Q419/ML610Q419C
•
Capture
−
Time base capture
×
2 channels (4096 Hz to 32 Hz)
•
PWM
−
Resolution 16 bits
×
1 channel
•
Synchronous serial port
−
Master/slave selectable
×
2 channel
−
LSB first/MSB first selectable
−
8-bit length/16-bit length selectable
•
UART
−
TXD/RXD
×
1 channel
−
Bit length, parity/no parity, odd parity/even parity, 1 stop bit/2 stop bits
−
Positive logic/negative logic selectable
−
Built-in baud rate generator
•
I
2
C bus interface
−
Master function only
−
Fast mode (400 kbps@４MH½), standard mode (100 kbps@1MH½, 50kbps@500kHz)
•
Melody driver
−
Scale: 29 types (Melody sound frequency: 508 Hz to 32.768 kHz)
−
Tone length: 63 types
−
Tempo: 15 types
−
Buzzer output mode (4 output modes, 8 frequencies, 16 duty levels)
•
RC oscillation type A/D converter
−
24-bit counter
−
Time division
×
2 channels
•
Successive approximation type A/D converter (SA-ADC)
−
12-bit A/D converter
−
Input
×
4 channels
•
General-purpose ports
−
Input-only port
×
6 channels (including secondary functions)
−
Output-only port
×
3 channels (including secondary functions)
−
Input/output port
ML610Q419 : 18 channels (including secondary functions)
ML610Q419C : 26 channels (including secondary functions)
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FEDL610Q419-05
ML610Q419/ML610Q419C
•
LCD driver
−
Dot matrix can be supported.
ML610Q419 : 192 dots max. (48 seg
×
4 com)
ML610Q419C : 160 dots max. (40 seg
×
4 com)
−
1/1 to 1/4 duty
−
1/2, 1/3 bias (built-in bias generation circuit)
−
Frame frequency selecable: approx. 64Hz, 73Hz, 85Hz, and 102Hz
−
Bias voltage multiplying clock selectable (8 types)
−
LCD drive stop mode, LCD display mode, all LCDs on mode, and all LCDs off mode selectable
−
Programmable display allocation function
•
Reset
−
Reset by the RESET_N pin
−
Reset by power-on detection
−
Reset when oscillation stop of the low-speed clock is detected
−
Reset by low level detection (LLD)
The voltage which is released from reset is selectable by the code-option: 1.1V, 1.8V (Max.)
−
Reset by the watchdog timer (WDT) 2
nd
overflow
•
Power supply voltage detect function
−
Judgment voltages:
One of 16 levels
−
Judgment accuracy:
±2%
(Typ.)
•
Clock
−
Low-speed clock: (This LSI can not guarantee the operation withoug low-speed clock)
Crystal oscillation (32.768 kHz)
−
High-speed clock:
Built-in RC oscillation (500kHz)
Built-in PLL oscillation (8.192 MHz
±2.5%),
crystal/ceramic oscillation (4.096 MHz), external clock
−
Selection of high-speed clock mode by software:
Built-in RC oscillation, built-in PLL oscillation, crystal/ceramic oscillation, external clock
•
Power management
−
HALT mode: Instruction execution by CPU is suspended (peripheral circuits are in operating states).
−
STOP mode: Stop of low-speed oscillation and high-speed oscillation (Operations of CPU and peripheral circuits are
stopped.)
−
Clock gear: The frequency of high-speed system clock can be changed by software (1/1, 1/2, 1/4, or 1/8 of the oscillation
clock)
−
Block Control Function: Power down (reset registers and stop clock supply) the circuits of unused peripherals.
•
Guaranteed operating range
−
Operating temperature:
−20°C
to 70°C (P version:
−40°C
to 85°C)
−
Operating voltage: V
DD
= 1.1V to 3.6V
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FEDL610Q419-05
ML610Q419/ML610Q419C
•
Product name – S
upported
Function
Operating
temperature
-20°C to +70°C
- Chip (Die) -
ROM type
LCD driver
192 dots max.
(48 seg x 4 com)
192 dots max.
(48 seg x 4 com)
160 dots max.
(40 seg x 4 com)
160 dots max.
(40 seg x 4 com)
Product availability
ML610Q419-xxxWA
Flash ROM
Yes
ML610Q419P-xxxWA
Flash ROM
-40°C to +85°C
Yes
ML610Q419C -xxxWA
Flash ROM
-20°C to +70°C
Yes
ML610Q419PC -xxxWA
Flash ROM
-40°C to +85°C
Yes
-100-pin plastic
TQFP -
ML610Q419-xxxTB
ROM type
Operating
temperature
-20°C to +70°C
LCD driver
192 dots max.
(48 seg x 4 com)
192 dots max.
(48 seg x 4 com)
160 dots max.
(40 seg x 4 com)
160 dots max.
(40 seg x 4 com)
Product availability
Flash ROM
Yes
ML610Q419P-xxxTB
Flash ROM
-40°C to +85°C
Yes
ML610Q419C -xxxTB
Flash ROM
-20°C to +70°C
Yes
ML610Q419PC -xxxTB
Flash ROM
-40°C to +85°C
Yes
xxx: ROM code number (xxx of the blank product is NNN)
Q:Flash ROM version
P: Wide range temperature version
WA: Chip
TB: TQFP
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FEDL610Q419-05
ML610Q419/ML610Q419C
BLOCK DIAGRAM
ML610Q419 Block Diagram
Figure 1 show the block diagram of the ML610Q419.
"*" indicates the secondary function of each port.
CPU (nX-U8/100)
EPSW1½3
PSW
Timing
Controller
GREG
0½15
ALU
Instruction
Decoder
ELR1½3
LR
EA
SP
Instruction
Register
Data-bus
BUS
Controller
ECSR1½3
DSR/CSR
PC
Program
Memory
(Flash)
64Kbyte
+
Data
Flash
4Kbyte
INT
2
SCK0*
SIN0*
SOUT0*
SCK1*
SIN1*
SOUT1*
UART
INT
1
I
2
C
INT
1
PWM
INT
1
TBC
INT
5
8bit Timer
×2
Melody
MD0*
PWM0*
SDA*
SCL*
RXD0*
TXD0*
On-Chip
ICE
V
DD
V
SS
RESET_N
TEST0
TEST1_N
XT0
XT1
OSC0*
OSC1*
LSCLK*
OUTCLK*
V
DDL
Power
OSC
RESET &
TEST
RAM
2048byte
Interrupt
Controller
INT
1
INT
1
SSIO
×2
WDT
IN0*
CS0*
RS0*
RT0*
CRT0*
RCM*
IN1*
CS1*
RS1*
RT1*
AV
DD
AV
SS
V
REF
AIN0, AIN1,
AIN2, AIN3
INT
1
INT
4
RC-ADC
×2
INT
4
Capture
×2
GPIO
INT
1
12bit-ADC
P00 to P03
P10 to P11
P20 to P22
P30 to P35
P40 to P47
P50 to P53
Display Allocation
RAM
LCD
Driver
COM0 to COM3
SEG0 to SEG47
V
L1
, V
L2
, V
L3
C1, C2
BLD
Display
register
192bit
LCD
BIAS
Figure 1 ML610Q419 Block Diagram
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