FEDL64168-01
Semiconductor
ML64168
GENERAL DESCRIPTION
This version: Sep. 27,1999
Previous version: Jun. 22,1999
4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver
The ML64168 is a low power 4-bit microcontroller incorporating the Oki's original CPU core nX-4/30.
The ML64168 provides a minimum instruction execution time of 4.3µs (@700kHz).
The ML64168 contains 8160-byte program memory, 512-nibble data memory, three 4-bit input-output
ports, 4-bit input port, 4-bit output port, 2-channel RC oscillation type A/D converter, LCD driver for up
to 120 segments, and buzzer output port.
The ML64P168 is the one-time-programmable ROM version of ML64168, having one-time
PROM(OTP) as internal program memory. The ML64P168 is used to evaluate the software
development.
APPLICATION
The ML64168 is best suited for low power, high precision thermometers and hygrometers.
FEATURES
∙
Processing speed
Minimum instruction execution time
: 4.3
µs
@700 kHz
91.6
µs
@32.768 kHz
∙
Clock generation circuit
Low-speed clock
: 32.768 kHz crystal oscillator
High-speed clock
: 700 kHz RC oscillator ( with an external resistor )
CPU clock is selectable as Low-speed clock / High-speed clock by software.
∙
Operating voltage
: 1.5 V spec. / 3.0 V spec. ( selectable by mask option )
1.25 to 1.70 V (1.5 V spec.)
2.0 to 3.50 V (3.0 V spec.)
2.2 to 3.50 V (3.0 V spec., 1/2duty)
∙
Operating temperature
: - 40 to +85°C
∙
Memory space
Internal program memory
: 8160 bytes
Internal data memory
: 512 nibbles
∙
RC oscillation type A/D converter
: 2 channels
Time division 2-channel method
Counter A
: 1 / ( 10
4
×
8 )
×
1
Counter B
: 1 / 2
14
×
1
The information contained herein can change without notice owing to product and/or technical improvements.
Before using the product, please make sure that the information being referred to is up-to-date.
1/49
FEDL64168-01
Semiconductor
ML64168
: 3 ports
×
4 bits
: 1 port
×
4 bits
: 1 port
×
4 bits
( 8 out of the 34 LCD driver outputs can be used as
output-only ports by mask option. )
∙
LCD driver
: 34 outputs
(1) At 1/4 duty and 1/3 bias
: 120 segments (max.)
(2) At 1/3 duty and 1/3 bias
: 93 segments (max.)
(3) At 1/2 duty and 1/2 bias
: 64 segments (max.)
Voltage Regulator for LCD Driver (selectable by mask option)
The LCD panel display is stable regardless of temporary supply voltage drop, because the voltage
generated by the voltage regulator for LCD driver is supplied to the bias voltage generator as a
reference voltage.
LCD Operating Voltage
When the voltage regulator for LCD driver is used
: 3.6 V ( Duty cycle = 1/4 or 1/3 )
: 2.4 V ( Duty cycle = 1/2 )
When the voltage regulator for LCD driver is not used
: 4.5 V ( Duty cycle = 1/4 or 1/3 )
: 3.0 V ( Duty cycle = 1/2 )
∙
Buzzer driver
: 1 output ( 4 output modes selectable )
∙
Serial port
: Synchronous 8-bit transfer
Selectable as external clock / internal clock
Selectable as MSB first / LSB first
∙
Capture circuit
: 2 channels ( 32Hz, 64Hz, 128Hz, 256Hz )
∙
Battery check circuit
: 1 ( incorporated into the input-only port )
∙
Watchdog timer
∙
Interrupt
External interrupt
: 2 sources
Internal interrupt
: 8 sources
∙
Package:
80-pin plastic QFP ( QFP80-P-1420-0.80-BK ) : ( Product name : ML64168-xxxGP )
80-pin plastic QFP ( QFP80-P-1414-0.65-K )
: ( Product name : ML64168-xxxGA )
80-pin plastic TQFP ( TQFP80-P-1212-0.50-K ):( Product name : ML64168-xxxTB )
Chip
: ( Product name : ML64168-xxx )
xxx indicates a code number.
∙
I/O port
Input-output port
Input port
Output port
PROGRAM DEVELOPMENT ENVIRONMENT
∙
Structured Assembler
:
SASM64K
∙
In Circuit Emulator
:
EASE64168
∙
Debugger
:
DT64K
∙
OTP version product
:
ML64P168
( replaces the built-in program memory with one-time PROM )
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FEDL64168-01
Semiconductor
ML64168
BLOCK DIAGRAM
CPU CORE: nX-4/30
DATA BUS ( 8 )
IR
DECORDER
IR
PCM PCL
ROMR
ROM
8160
Bytes
BSR
MIEF
HALT
TR2
TR0
TR1
PCH
C
ALU
B A
DATA BUS ( 8 )
H L
X Y
TIMING
CONTROLLER
SP
RAM
512
Nibbles
V
DD1
V
DD2
V
DD3
C1
C2
L0
L1
to
L33
CAPR
V
DDI
P2
P3
P4
INT
V
DDI
P1.0
P1.1
P1.2
P1.3
P2.0
P2.1
P4.3
to
ADDRESS BUS
BC
INT
OSC1
OSC2
XT
XT
RST
TST1
TST2
5
2CLK
TBC
INT
BD
BD
SIOP
BIAS
RSTC
LCD
TST
V
DDL
VR
INTC
WDT
INT
IN0
CS0
RS0
CRT0
RT0
IN1
CS1
RS1
RT1
P1
ADC
V
DDI
P0.0
P0.1
P0.2
P0.3
P0
INT
INT
3/49
FEDL64168-01
Semiconductor
ML64168
PIN CONFIGURATION (TOP VIEW)
RESET
OSC1
66
OSC2
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
25
26
27
28
29
30
VDDL 31
VSS 32
33
34
35
36
37
39
38
40
TST2
TST1
P0.3
P0.2
P0.1
P0.0
P1.3
P1.2
P1.1
P1.0
XT
69
VDD
67
XT
68
80
79
78
77
76
75
74
73
72
71
L0
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
L15
L16
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
P3.2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
70
L33 / P6.3
L32 / P6.2
L31 / P6.1
L30 / P6.0
L29 / P5.3
L28 / P5.2
L27 / P5.1
L26 / P5.0
L25
L24
L23
L22
L21
L20
L19
L18
L17
C2
C1
V
DD3
V
DD2
V
DDI
V
DD1
RT1
CRT0
P3.3
P4.0
P4.1
P4.2
P4.3
RS0
RT0
CS0
( GP : QFP80-P-1420-0.80-BK )
80-Pin Plastic QFP
CS1
RS1
BD
IN0
IN1
4/49
FEDL64168-01
Semiconductor
ML64168
PIN CONFIGURATION (TOP VIEW) ( continued )
L33 / P6.3
62
L32 / P6.2
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
21
22
23
25
26
27
28
29
30
31
32
33
34
35
36
37
39
24
38
40
RESET
OSC1
64
66
80
79
78
77
76
75
74
73
72
71
70
69
68
67
65
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
L15
L16
P2.0
P2.1
P2.2
P2.3
P3.0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
63
OSC2
TST2
TST1
P0.3
P0.2
P0.1
P0.0
P1.3
P1.2
P1.1
P1.0
XT
L1
L0
V
DD
XT
L31 / P6.1
L30 / P6.0
L29 / P5.3
L28 / P5.2
L27 / P5.1
L26 / P5.0
L25
L24
L23
L22
L21
L20
L19
L18
L17
C2
C1
V
DD3
V
DD2
V
DDI
RS0
RS1
BD
CRT0
V
DDL
( GA : QFP80-P-1414-0.65-K ) , ( TB : TQFP80-P-1212-0.50-K )
80-Pin Plastic QFP, TQFP
V
DD1
CS0
RT0
CS1
P3.1
P3.2
P3.3
P4.0
P4.1
P4.2
P4.3
RT1
IN0
IN1
V
SS
5/49
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