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ML65541/ML65L541*
High Speed Octal Buffer/Line Drivers
GENERAL DESCRIPTION
The ML65541 and ML65L541 are non-inverting octal
buffer/line drivers. The high operating frequency (50MHz
driving a 50pF load) and low propagation delay (ML65541
– 1.7 ns, ML65L541 – 2 ns) make them ideal for very high
speed applications such as processor bus buffering and
cache and main memory control.
These buffers use a unique analog implementation to
eliminate the delays inherent in traditional digital
designs. Schottky clamps reduce under and overshoot,
and special output driver circuits limit ground bounce. The
ML65541 and ML65L541 conform to the pinout and
functionality of the industry standard FCT541 and are
intended for applications where propagation delay is
critical to the system design.
Note: This part was previously numbered ML6581.
FEATURES
s
Low propagation delay — 1.7ns ML65541
2.0ns ML65L541
s
Fast 8-bit TTL level buffer/line driver with three-state
capability on the output
s
TTL compatible input and output levels
s
Schottky diode clamps on all inputs to handle
undershoot and overshoot
s
Onboard schottky diodes minimize noise
s
Reduced output swing of 0 – 4.1 volts
s
Ground bounce controlled outputs, typically less
than 400mV
s
Industry standard FCT541 type pinout
s
Applications include high speed cache memory, main
memory, processor bus buffering, and graphics cards
*This Part Is Obsolete
BLOCK DIAGRAM
VCC
20
VCC
OE1 1
OE2 19
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
10
GND
18
B0
17
B1
16
B2
15
B3
14
B4
13
B5
12
B6
11
B7
REV. 1.0 10/25/2000
ML65541/ML65L541
Pin Configuration
20-Pin SOIC, QSOP
OE1
A0
A1
A2
A3
A4
A5
A6
A7
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
OE2
B0
B1
B2
B3
B4
B5
B6
B7
TOP VIEW
PIN DESCRIPTION
NAME
Ai
Bi
OE1
&
OE2
GND
V
CC
I/O
I
O
I
I
I
DESCRIPTION
Data Bus A
Data Bus B
Output Enable
Signal Ground
+ 5V supply
FUNCTION TABLE
OE1/OE2
H
L
L
L = Logic Low
H = Logic High
X = Don’t Care
Z = High Impedance
A
X
L
H
B
Z
L
H
Absolute Maximum Ratings
V
CC ................................................................................
–0.3V to 7V
DC Input voltage ............................. –0.3V to V
CC
+ 0.3V
AC Input voltage (< 20ns) ...................................... –3.0V
DC Output voltage .......................... –0.3V to V
CC
+ 0.3V
Output sink current (per pin) ................................ 120mA
Storage temperature ................................ –65°C to 150°C
Junction temperature .............................................. 150°C
Thermal Impedance (θ
JA
)
SOIC ............................................................... 96°C/W
QSOP ............................................................ 100°C/W
2
REV. 1.0 10/25/2000
ML65541/ML65L541
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, these specifications apply for: V
CC
= 5.0 ± 5%V, T
A
= 0°C to 70°C (Note 1).
symbol
parameter
conditions
min
typ
max
units
AC ELECTRICAL CHARACTERISTICS
(C
LOAD
= 50pF, R
LOAD
= 500½)
t
PLH
, t
PHL
Propagation delay
Ai to Bi (Note 2)
ML65541
ML65L541
t
OE
t
OD
C
IN
Output enable time
OE1, OE2
to Bi
Output disable time
OE1, OE2
to Bi
Input capacitance
8
1.4
1.6
10
1.7
2.0
15
ns
ns
ns
10
ns
pF
DC ELECTRICAL CHARACTERISTICS
(C
LOAD
= 50pF, R
LOAD
= )
V
IH
V
IL
I
IH
Input high voltage
Input low voltage
Input high current
Logic HIGH
Logic LOW
Per pin, V
IN
= 3V
ML65541
ML65L541
I
IL
Input low current
Per pin, V
IN
= 0
ML65541
ML65L541
I
HI-Z
I
OS
V
IC
V
OH
V
OL
V
OFF
Three-state output current
Short circuit current
Input clamp voltage
Output high voltage
Output low voltage
V
IN
– V
OUT
per buffer
V
CC
= 5.25V, 0 < V
IN
< V
CC
V
CC
= 5.25V, V
O
= GND
(Note 3)
V
CC
= 4.75V, I
IN
= 18mA
V
CC
= 4.75V, I
OH
= 100µA
(Notes 4 & 5)
V
CC
= 4.75V, I
OL
= 25mA
(Notes 4 & 5)
V
CC
= 4.75V (Note 4) ML65541
ML65L541
I
CC
Note
Note
Note
Note
1:
2:
3:
4:
2.0
0.8
0.5
0.3
2.4
0.8
1.5
0.5
3.5
1.0
5
–60
–0.7
2.4
0.6
0
0
100
200
55
200
300
80
–225
–1.2
V
V
mA
mA
mA
mA
µA
mA
V
V
V
mV
mV
mA
Quiescent Power
Supply Current
V
CC
= 5.25V, f = 0Hz,
Inputs/outputs open
Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions
One line switching, see Figure 3, t
PLH
, t
PHL
versus C
L
.
Not more than one output should be shorted for more than a second.
This is a true analog buffer. In the linear region, the output tracks the input with an offset (V
OFF
). For V
OH
, V
IN
= 2.7V.
V
OH MIN
includes V
OFF
. For V
OL
, V
IN
= 0V, V
OL MAX
includes V
OFF
Note 5:
See Figure 2 for I
OH
versus V
OH
and I
OL
versus V
OL
data.
t
R
, t
F
≤
4ns
3V
INPUT
0V
3V
OUTPUT
0V
1.5V
1.5V
t
PLH
1.5V
1.5V
t
PHL
REV. 1.0 10/25/2000
3
ML65541/ML65L541
CH1 1.00V
CH2 1.00V
10.0ns
CH1 1.00V
CH2 1.00V
10.0ns
74FCT541
ML65541
Figure 1. Ground Bounce Comparison, Four Outputs Switching into 50pF Loads.
220
200
180
160
+20
0
–20
–40
I
OL
(mA)
120
100
80
60
40
20
0
0.0
0.5
1.0
V
OL
(V)
1.5
2.0
2.5
I
OH
(mA)
140
–60
–80
–100
–120
–140
–160
–180
–200
2.5
3.0
V
OH
(V)
3.5
4.0
Figure 2a. Typical VOL Versus IOL
for One Buffer Output.
3.0
210
Figure 2b. Typical VOH Versus IOH
for One Buffer Output.
150pF
2.5
ML65L541
2.0
t
pd
(ns)
190
100pF
170
75pF
50pF
ML65541
1.5
I
CC
(mA)
150
130
110
90
30pF
1.0
0.5
70
0.0
30
50
75
LOAD CAPACITANCE (pF)
100
150
50
10
20
30
40
50
60
70
80
90
FREQUENCY (MHz)
Figure 3. Propagation Delay (tPLH, tPHL) Versus Load
Capacitance, One Output Switching.
4
Figure 4. ICC Versus Frequency for Various Load
Capacitances, Four Outputs Switching.
REV. 1.0 10/25/2000
