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MM74HC154 4-to-16 Line Decoder
September 1983
Revised July 2003
MM74HC154
4-to-16 Line Decoder
General Description
The MM74HC154 decoder utilizes advanced silicon-gate
CMOS technology, and is well suited to memory address
decoding or data routing applications. It possesses high
noise immunity, and low power consumption of CMOS with
speeds similar to low power Schottky TTL circuits.
The MM74HC154 have 4 binary select inputs (A, B, C, and
D). If the device is enabled these inputs determine which
one of the 16 normally HIGH outputs will go LOW. Two
active LOW enables (G1 and G2) are provided to ease
cascading of decoders with little or no external logic.
Each output can drive 10 low power Schottky TTL equiva-
lent loads, and is functionally and pin equivalent to the
74LS154. All inputs are protected from damage due to
static discharge by diodes to V
CC
and ground.
Features
s
Typical propagation delay: 21 ns
s
Power supply quiescent current: 80
µ
A
s
Wide power supply voltage range: 2–6V
s
Low input current: 1
µ
A maximum
Ordering Code:
Order Number
MM74HC154WM
MM74HC154MTC
MM74HC154N
Package Number
M24B
MTC24
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC and TSSOP
Truth Table
Inputs
G1 G2
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
D
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
X
X
X
C
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
X
X
X
B
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
X
X
X
A
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
X
X
X
Low
Output
(Note 1)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
—
—
—
Top View
L
L
L
L
L
L
H
H
Note 1:
All others HIGH
© 2003 Fairchild Semiconductor Corporation
DS005122
www.fairchildsemi.com
MM74HC154
Logic Diagram
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2
MM74HC154
Absolute Maximum Ratings
(Note 2)
(Note 3)
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
Clamp Diode Current (I
IK
, I
OK
)
DC Output Current, per pin (I
OUT
)
DC V
CC
or GND Current, per pin (I
CC
)
Storage Temperature Range (T
STG
)
Power Dissipation (P
D
)
(Note 4)
S.O. Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
°
C
(Note 5)
Conditions
Recommended Operating
Conditions
Min Max Units
Supply Voltage (V
CC
)
DC Input or Output Voltage (V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
Input Rise or Fall Times
(t
r
, t
f
) V
CC
=
2.0V
V
CC
=
4.5V
V
CC
=
6.0V
1000
500
400
ns
ns
ns
2
0
6
V
CC
V
V
−
0.5 to
+
7.0V
−
1.5 to V
CC
+
1.5V
−
0.5 to V
CC
+
0.5V
±
20 mA
±
25 mA
±
50 mA
−
65
°
C to
+
150
°
C
600 mW
500 mW
−
40
+
85
°
C
Note 2:
Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 3:
Unless otherwise specified all voltages are referenced to ground.
Note 4:
Power Dissipation temperature derating — plastic “N” package:
−
12 mW/°C from 65°C to 85°C.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum HIGH
Level Input
Voltage
V
IL
Maximum LOW
Level Input
Voltage
V
OH
Minimum HIGH
Level Output
Voltage
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
T
A
=
25°C
Typ
1.5
3.15
4.2
0.5
1.35
1.8
2.0
4.5
6.0
4.2
5.7
0
0
0
0.2
0.2
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
±0.1
8.0
T
A
= −40
to 85°C
Guaranteed Limits
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1.0
80
Units
V
V
V
IN
=
V
IH
or V
IL
|I
OUT
|
≤
20
µA
2.0V
4.5V
6.0V
V
IN
=
V
IH
or V
IL
|I
OUT
|
≤
4.0 mA
|I
OUT
|
≤
5.2 mA
4.5V
6.0V
2.0V
4.5V
6.0V
V
IN
=
V
IH
or V
IL
|I
OUT
|
≤
4.0 mA
|I
OUT
|
≤
5.2 mA
4.5V
6.0V
6.0V
6.0V
V
µA
µA
V
V
V
OL
Maximum LOW
Level Output
Voltage
V
IN
=
V
IH
or V
IL
|I
OUT
|
≤
20
µA
V
I
IN
I
CC
Maximum
Input Current
Maximum
Quiescent
Supply Current
V
IN
=
V
CC
or GND
V
IN
=
V
CC
or GND
I
OUT
=
0
µA
Note 5:
For a power supply of 5V
±10%
the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
3
www.fairchildsemi.com
MM74HC154
AC Electrical Characteristics
V
CC
=
5V, T
A
=
25
°
C, C
L
=
15 pF, t
r
=
t
f
=
6 ns
Symbol
Parameter
t
PHL
, t
PLH
Maximum Propagation Delay, G1 , G2 or A, B, C, D
Conditions
Typ
21
Guaranteed Limit
32
Units
ns
AC Electrical Characteristics
V
CC
=
2.0V to 6.0V, C
L
=
50 pF, t
r
=
t
f
=
6 ns (unless otherwise specified)
Symbol
t
PHL
, t
PLH
Parameter
Maximum Propagation
Delay, G1 or G2
or A, B, C, D
t
TLH
, t
THL
Maximum Output
Rise and Fall Time
C
PD
C
IN
Power Dissipation
Capacitance (Note 6)
Maximum Input
Capacitance
Conditions
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
T
A
=
25°C
Typ
63
24
20
25
7
6
90
5
10
10
160
36
30
75
15
13
T
A
= −40
to 85°C
Guaranteed Limits
190
42
35
95
19
16
pF
pF
ns
ns
Units
Note 6:
C
PD
determines the no load dynamic power consumption, P
D
=
C
PD
V
CC2
f
+
I
CC
V
CC
, and the no load dynamic current consumption,
I
S
=
C
PD
V
CC
f
+
I
CC
.
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4
