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MM74HC32SJ

Logic Gates Quad 2-Input OR Gate

器件类别:逻辑    逻辑   

厂商名称:Fairchild

厂商官网:http://www.fairchildsemi.com/

器件标准:

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器件参数
参数名称
属性值
Brand Name
Fairchild Semiconductor
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Fairchild
零件包装代码
SOP
包装说明
SOP, SOP14,.3
针数
14
制造商包装代码
14LD,SOP,EIAJ TYPE II, 5.3MM WIDE
Reach Compliance Code
compliant
ECCN代码
EAR99
系列
HC/UH
JESD-30 代码
R-PDSO-G14
JESD-609代码
e3
长度
10.2 mm
负载电容(CL)
50 pF
逻辑集成电路类型
OR GATE
最大I(ol)
0.004 A
湿度敏感等级
1
功能数量
4
输入次数
2
端子数量
14
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装等效代码
SOP14,.3
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
包装方法
RAIL
峰值回流温度(摄氏度)
260
电源
2/6 V
Prop。Delay @ Nom-Sup
25 ns
传播延迟(tpd)
125 ns
认证状态
Not Qualified
施密特触发器
NO
座面最大高度
2.1 mm
最大供电电压 (Vsup)
6 V
最小供电电压 (Vsup)
2 V
标称供电电压 (Vsup)
4.5 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Matte Tin (Sn)
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
30
宽度
5.3 mm
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MM74HC32 — Quad 2-Input OR Gate
February 2008
MM74HC32
Quad 2-Input OR Gate
Features
Typical propagation delay: 10ns
Wide power supply range: 2V–6V
Low quiescent current: 20µA maximum (74HC Series)
Low input current: 1µA maximum
Fanout of 10 LS-TTL loads
General Description
The MM74HC32 OR gates utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
LS-TTL gates with the low power consumption of stan-
dard CMOS integrated circuits. All gates have buffered
outputs providing high noise immunity and the ability to
drive 10 LS-TTL loads. The 74HC logic family is func-
tionally as well as pin-out compatible with the standard
74LS logic family. All inputs are protected from damage
due to static discharge by internal diode clamps to V
CC
and ground.
Ordering Information
Package
Order Number Number
MM74HC32M
MM74HC32SJ
MM74HC32MTC
MM74HC32N
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Logic Diagram
Y
=
A+B
(1 of 4)
Top View
©1983 Fairchild Semiconductor Corporation
MM74HC32 Rev. 1.3.0
www.fairchildsemi.com
MM74HC32 — Quad 2-Input OR Gate
Absolute Maximum Ratings
(1)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
I
IK
, I
OK
I
OUT
I
CC
T
STG
P
D
Supply Voltage
DC Input Voltage
DC Output Voltage
Clamp Diode Current
DC Output Current, per pin
Parameter
Rating
–0.5 to +7.0V
–1.5 to V
CC
+1.5V
–0.5 to V
CC
+0.5V
±20mA
±25mA
±50mA
–65°C to +150°C
600mW
500mW
260°C
DC V
CC
or GND Current, per pin
Storage Temperature Range
Power Dissipation
Note 2
S.O. Package only
Lead Temperature (Soldering 10 seconds)
T
L
Notes:
1. Unless otherwise specified all voltages are referenced to ground.
2. Power Dissipation temperature derating — plastic “N” package: –12mW/°C from 65°C to 85°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IN
, V
OUT
T
A
t
r
, t
f
Supply Voltage
DC Input or Output Voltage
Parameter
Min.
2
0
–40
Max.
6
V
CC
+85
1000
500
400
Units
V
V
°C
ns
ns
ns
Operating Temperature Range
Input Rise or Fall Times
V
CC
=
2.0V
V
CC
=
4.5V
V
CC
=
6.0V
©1983 Fairchild Semiconductor Corporation
MM74HC32 Rev. 1.3.0
www.fairchildsemi.com
2
MM74HC32 — Quad 2-Input OR Gate
DC Electrical Characteristics
(3)
T
A
=
25°C
Symbol
V
IH
T
A
=
–40°C to
85°C
Units
V
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1.0
20
µA
µA
V
V
V
Parameter
Minimum HIGH Level
Input Voltage
V
CC
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
Conditions
Typ
Guaranteed Limits
1.5
3.15
4.2
0.5
1.35
1.8
V
IL
Maximum LOW Level
Input Voltage
V
OH
Minimum HIGH Level
Output Voltage
V
IN
=
V
IH
or V
IL
,
|I
OUT
|
20µA
V
IN
=
V
IH
or V
IL
,
|I
OUT
|
4.0mA
|V
IN
=
V
IH
or V
IL
,
|I
OUT
|
5.2mA
V
IN
=
V
IL
,
|I
OUT
|
20 µA
V
IN
=
V
IL
,
|I
OUT
|
4.0mA
V
IN
=
V
IL
,
|I
OUT
|
5.2mA
V
IN
=
V
CC
or GND
V
IN
=
V
CC
or GND,
I
OUT
=
0µA
2.0
4.5
6.0
4.7
5.2
0
0
0
0.2
0.2
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
±0.1
2.0
V
OL
Maximum LOW Level
Output Voltage
2.0
4.5
6.0
4.5
6.0
I
IN
I
CC
Maximum Input
Current
Maximum Quiescent
Supply Current
6.0
6.0
Note:
3. For a power supply of 5V ±10% the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V
values should be used when designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V
respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage current (I
IN
, I
CC
, and I
OZ
) occur for CMOS at
the higher voltage and so the 6.0V values should be used.
©1983 Fairchild Semiconductor Corporation
MM74HC32 Rev. 1.3.0
www.fairchildsemi.com
3
MM74HC32 — Quad 2-Input OR Gate
AC Electrical Characteristics
V
CC
=
5V, T
A
=
25°C, C
L
=
15pF, t
r
=
t
f
=
6ns
Symbol
t
PHL
, t
PLH
Parameter
Maximum Propagation Delay
Conditions
Typ.
10
Guaranteed
Limit
18
Units
ns
AC Electrical Characteristics
V
CC
=
2.0V to 6.0V, C
L
=
50pF, t
r
=
t
f
=
6ns (unless otherwise specified)
T
A
=
25°C
Symbol
Parameter
V
CC
(V)
2.0
4.5
6.0
t
TLH
, t
THL
Maximum Output Rise
and Fall Time
2.0
4.5
6.0
C
PD
C
IN
Power Dissipation
Capacitance
(4)
Maximum Input
Capacitance
(per gate)
T
A
=
–40°C
to 85°C
Units
ns
125
25
21
95
19
16
pF
ns
Conditions
Typ
30
12
9
30
8
7
50
5
Guaranteed Limits
100
20
17
75
15
13
t
PHL
, t
PLH
Maximum Propagation
Delay
10
10
pF
Note:
4. C
PD
determines the no load dynamic power consumption, P
D
=
C
PD
V
CC2
f + I
CC
V
CC
, and the no load dynamic
current consumption, I
S
=
C
PD
V
CC
f + I
CC
.
©1983 Fairchild Semiconductor Corporation
MM74HC32 Rev. 1.3.0
www.fairchildsemi.com
4
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参数对比
与MM74HC32SJ相近的元器件有:MM74HC32MTC。描述及对比如下:
型号 MM74HC32SJ MM74HC32MTC
描述 Logic Gates Quad 2-Input OR Gate LDO Voltage Regulators 800mA ULN LDO 3.3Vo
Brand Name Fairchild Semiconductor Fairchild Semiconductor
是否无铅 不含铅 不含铅
是否Rohs认证 符合 符合
厂商名称 Fairchild Fairchild
零件包装代码 SOP TSSOP
包装说明 SOP, SOP14,.3 TSSOP, TSSOP14,.25
针数 14 14
制造商包装代码 14LD,SOP,EIAJ TYPE II, 5.3MM WIDE 14 LD,TSSOP,JEDEC MO-153, 4.4MM WIDE
Reach Compliance Code compliant compliant
ECCN代码 EAR99 EAR99
系列 HC/UH HC/UH
JESD-30 代码 R-PDSO-G14 R-PDSO-G14
JESD-609代码 e3 e4
长度 10.2 mm 5 mm
负载电容(CL) 50 pF 50 pF
逻辑集成电路类型 OR GATE OR GATE
最大I(ol) 0.004 A 0.004 A
湿度敏感等级 1 1
功能数量 4 4
输入次数 2 2
端子数量 14 14
最高工作温度 85 °C 85 °C
最低工作温度 -40 °C -40 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOP TSSOP
封装等效代码 SOP14,.3 TSSOP14,.25
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法 RAIL RAIL
峰值回流温度(摄氏度) 260 260
电源 2/6 V 2/6 V
Prop。Delay @ Nom-Sup 25 ns 25 ns
传播延迟(tpd) 125 ns 125 ns
认证状态 Not Qualified Not Qualified
施密特触发器 NO NO
座面最大高度 2.1 mm 1.2 mm
最大供电电压 (Vsup) 6 V 6 V
最小供电电压 (Vsup) 2 V 2 V
标称供电电压 (Vsup) 4.5 V 4.5 V
表面贴装 YES YES
技术 CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL
端子面层 Matte Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式 GULL WING GULL WING
端子节距 1.27 mm 0.65 mm
端子位置 DUAL DUAL
处于峰值回流温度下的最长时间 30 NOT SPECIFIED
宽度 5.3 mm 4.4 mm
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