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MMA2300KEGR2

Accelerometers X-AXIS 250G NOMINAL

器件类别:模拟混合信号IC    信号电路   

厂商名称:NXP(恩智浦)

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器件参数
参数名称
属性值
Brand Name
Freescale
是否无铅
含铅
是否Rohs认证
符合
厂商名称
NXP(恩智浦)
零件包装代码
SOIC
包装说明
ROHS COMPLIANT, SOIC-16
针数
16
Reach Compliance Code
unknown
ECCN代码
EAR99
模拟集成电路 - 其他类型
ANALOG CIRCUIT
JESD-30 代码
R-PDSO-G16
JESD-609代码
e3
长度
10.3 mm
湿度敏感等级
3
功能数量
1
端子数量
16
最高工作温度
125 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装等效代码
SOP16,.4
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
250
电源
5 V
认证状态
Not Qualified
座面最大高度
3.55 mm
最大供电电压 (Vsup)
5.25 V
最小供电电压 (Vsup)
4.75 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
AUTOMOTIVE
端子面层
Matte Tin (Sn)
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
30
宽度
7.5 mm
文档预览
Freescale Semiconductor
Data Sheet: Technical Data
MMA2300KEG
Rev 1, 11/2012
Surface Mount
Micromachined Accelerometer
The MMA series of silicon capacitive, micromachined accelerometers feature
signal conditioning, a 4-pole low pass filter and temperature compensation.
Zero-g offset full scale span and filter cut-off are factory set and require no
external devices. A full system self-test capability verifies system functionality.
Features
Integral Signal Conditioning
Linear Output
Ratiometric Performance
4th Order Bessel Filter Preserves Pulse Shape Integrity
Calibrated Self-test
Low Voltage Detect, Clock Monitor, and EPROM Parity Check Status
Transducer Hermetically Sealed at Wafer Level for Superior Reliability
Robust Design, High Shocks Survivability
Qualified AEC-Q100, Rev. F Grade 2 (-40C/ +105C)
MMA2300KEG
MMA2300KEG: X-AXIS SENSITIVITY
MICROMACHINED
ACCELEROMETER
±250g
Typical Applications
Vibration Monitoring and Recording
Impact Monitoring
KEG SUFFIX (Pb-FREE)
16-LEAD SOIC
CASE 475-01
ORDERING INFORMATION
Device Name
MMA2300EG
MMA2300EGR2
MMA2300KEG*
MMA2300KEGR2*
Temperature Range
–40to
125C
–40to
125C
–40to
125C
–40to
125C
Case No.
475-01
475-01
475-01
475-01
Package
SOIC-16
SOIC-16, Tape & Reel
SOIC-16
SOIC-16, Tape & Reel
*Part number sourced from a different facility.
V
DD
G-Cell
Sensor
Integrator
Gain
Filter
Temp
Comp
V
OUT
N/C
N/C
N/C
ST
V
OUT
STATUS
V
SS
V
DD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
ST
Self-test
Control Logic &
EPROM Trim Circuits
Oscillator
Clock
Generator
V
SS
STATUS
Figure 1. Simplified Accelerometer Functional Block Diagram
Figure 2. Pin Connections
© 2009, 2012 Freescale Semiconductor, Inc. All rights reserved.
Table 1. Maximum Ratings
(Maximum ratings are the limits to which the device can be exposed without causing permanent damage.)
Rating
Powered Acceleration (all axes)
Unpowered Acceleration (all axes)
Supply Voltage
Drop Test
(1)
Storage Temperature Range
1. Dropped onto concrete surface from any axis.
Symbol
G
pd
G
upd
V
DD
D
drop
T
stg
Value
1500
2000
–0.3 to +7.0
1.2
–40 to +125
Unit
g
g
V
m
°C
ELECTRO STATIC DISCHARGE (ESD)
WARNING: This device is sensitive to electrostatic
discharge.
Although the Freescale accelerometers contain internal
2 kV ESD protection circuitry, extra precaution must be taken
by the user to protect the chip from ESD. A charge of over
2000 volts can accumulate on the human body or associated
test equipment. A charge of this magnitude can alter the
performance or cause failure of the chip. When handling the
accelerometer, proper ESD precautions should be followed
to avoid exposing the device to discharges which may be
detrimental to its performance.
MMA2300KEG
2
Sensors
Freescale Semiconductor, Inc.
Table 2. Operating Characteristics
(Unless otherwise noted: –40°C
T
A
+105°C,
4.75
V
DD
5.25,
Acceleration = 0g, Loaded output.
(1)
)
Characteristic
Operating Range
(2)
Supply Voltage
(3)
Supply Current
Operating Temperature Range
Acceleration Range
Output Signal
Zero g (T
A
= 25°C, V
DD
= 5.0 V)
(4)
Zero g
Sensitivity (T
A
= 25°C, V
DD
= 5.0 V)
(5)
Sensitivity
Bandwidth Response
Nonlinearity
Noise
RMS (10 Hz – 1 kHz)
Power Spectral Density
Clock Noise (without RC load on output)
(6)
Self-Test
Output Response
(7)
Input Low
Input High
Input Loading
(8)
Response Time
(9)
Status
(10), (11)
Output Low (I
load
= 100
A)
Output High (I
load
= 100
A)
Minimum Supply Voltage (LVD Trip)
Clock Monitor Fail Detection Frequency
Output Stage Performance
Electrical Saturation Recovery Time
(12)
Full Scale Output Range (I
OUT
= 200
A)
Capacitive Load Drive
(13)
Output Impedance
Mechanical Characteristics
Transverse Sensitivity
(14)
Package Resonance
Symbol
V
DD
I
DD
T
A
g
FS
V
OFF
V
OFF,V
S
S
V
f
–3dB
NL
OUT
n
RMS
n
PSD
n
CLK
g
ST
V
IL
VIH
I
IN
t
ST
V
OL
V
OH
V
LVD
f
min
t
DELAY
V
FSO
C
L
Z
O
V
XZ,YZ
f
PKG
Min
4.75
3.0
40
2.4
0.47 V
DD
7.6
1.488
360
1.0
24
V
SS
0.7 xV
DD
30
V
DD
– 0.8
2.7
50
0.25
Typ
5.00
281
2.5
0.50 V
DD
8.0
1.6
400
110
2.0
30
100
2.0
3.25
0.2
300
10
Max
5.25
6.0
125
2.6
0.53 V
DD
8.4
1.712
440
1.0
2.8
36
0.3 x V
DD
V
DD
260
10
0.4
4.0
260
V
DD
–0.25
100
5.0
Unit
V
mA
C
g
V
V
mV/g
mV/g/V
Hz
% FSO
mVrms
V/(Hz
1/2
)
mVpk
g
V
V
A
ms
V
V
V
kHz
ms
V
pF
% FSO
kHz
1. For a loaded output the measurements are observed after an RC filter consisting of a 1 k resistor and a 0.01
F
capacitor to ground.
2. These limits define the range of operation for which the part will meet specification.
3. Within the supply range of 4.75 and 5.25 V, the device operates as a fully calibrated linear accelerometer. Beyond these supply limits the
device may operate as a linear device but is not guaranteed to be in calibration.
4. The device can measure both + and – acceleration. With no input acceleration the output is at midsupply. For positive acceleration the output
will increase above V
DD
/2 and for negative acceleration the output will decrease below V
DD
/2.
5. The device is calibrated at 35g.
6. At clock frequency
70 kHz.
7.
V
OFF
calculated with typical sensitivity.
8. The digital input pin has an internal pull-down current source to prevent inadvertent self test initiation due to external board level leakages.
9. Time for the output to reach 90% of its final value after a self-test is initiated.
10. The Status pin output is not valid following power-up until at least one rising edge has been applied to the self-test pin. The Status pin is
high whenever the self-test input is high, as a means to check the connectivity of the self-test and Status pins in the application.
11. The Status pin output latches high if a Low Voltage Detection or Clock Frequency failure occurs, or the EPROM parity changes to odd. The
Status pin can be reset low if the self-test pin is pulsed with a high input for at least 100
s,
unless a fault condition continues to exist.
12. Time for amplifiers to recover after an acceleration signal causes them to saturate.
13. Preserves phase margin (60°) to guarantee output amplifier stability.
14. A measure of the device's ability to reject an acceleration applied 90° from the true axis of sensitivity.
MMA2300KEG
Sensors
Freescale Semiconductor, Inc.
3
PRINCIPLE OF OPERATION
The Freescale accelerometer is a surface-micromachined
integrated-circuit accelerometer.
The device consists of a surface micromachined
capacitive sensing cell (g-cell) and a CMOS signal
conditioning ASIC contained in a single integrated circuit
package. The sensing element is sealed hermetically at the
wafer level using a bulk micromachined “cap'' wafer.
The g-cell is a mechanical structure formed from
semiconductor materials (polysilicon) using semiconductor
processes (masking and etching). It can be modeled as two
stationary plates with a moveable plate in-between. The
center plate can be deflected from its rest position by
subjecting the system to an acceleration (Figure
3).
When the center plate deflects, the distance from it to one
fixed plate will increase by the same amount that the distance
to the other plate decreases. The change in distance is a
measure of acceleration.
The g-cell plates form two back-to-back capacitors
(Figure
4).
As the center plate moves with acceleration, the
distance between the plates changes and each capacitor's
value will change, (C = A/D). Where A is the area of the
plate,
is the dielectric constant, and D is the distance
between the plates.
The CMOS ASIC uses switched capacitor techniques to
measure the g-cell capacitors and extract the acceleration
data from the difference between the two capacitors. The
ASIC also signal conditions and filters (switched capacitor)
the signal, providing a high level output voltage that is
ratiometric and proportional to acceleration.
SPECIAL FEATURES
Filtering
The Freescale accelerometers contain an onboard 2-pole
switched capacitor filter. A Bessel implementation is used
because it provides a maximally flat delay response (linear
phase) thus preserving pulse shape integrity. Because the
filter is realized using switched capacitor techniques, there is
no requirement for external passive components (resistors
and capacitors) to set the cut-off frequency.
Self-Test
The sensor provides a self-test feature that allows the
verification of the mechanical and electrical integrity of the
accelerometer at any time before or after installation. This
feature is critical in applications such as automotive airbag
systems where system integrity must be ensured over the life
of the vehicle. A fourth “plate'' is used in the g-cell as a self-
test plate. When the user applies a logic high input to the self-
test pin, a calibrated potential is applied across the self-test
plate and the moveable plate. The resulting electrostatic
2
1
V
-
force
Fe
=
--
A
------
causes the center plate to deflect.
2
d
2
The resultant deflection is measured by the accelerometer's
control ASIC and a proportional output voltage results. This
procedure assures that both the mechanical (g-cell) and
electronic sections of the accelerometer are functioning.
Status
Freescale accelerometers include fault detection circuitry
and a fault latch. The Status pin is an output from the fault
latch, OR'd with self-test, and is set high whenever the
following event occurs:
• Parity of the EPROM bits becomes odd in number.
The fault latch can be reset by a rising edge on the self-test
input pin, unless one (or more) of the fault conditions
continues to exist.
Acceleration
Figure 3. Transducer
Physical Model
Figure 4. Equivalent
Circuit Model
MMA2300KEG
4
Sensors
Freescale Semiconductor, Inc.
BASIC CONNECTIONS
Pinout Description
PCB Layout
STATUS
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
Accelerometer
ST
V
OUT
V
SS
V
DD
R
1 k
C 0.1
F
V
RH
C 0.1
F
P1
Microcontroller
P0
A/D In
C 0.01
F
N/C
N/C
N/C
ST
V
OUT
STATUS
V
SS
V
DD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
SS
C 0.1
F
V
DD
Table 3. Pin Descriptions
Pin No.
1 thru 3
4
5
6
7
8
9 thru 13
14 thru 16
Pin Name
ST
V
OUT
STATUS
V
SS
V
DD
Trim pins
Description
Leave unconnected.
Logic input pin used to initiate
self-test.
Output voltage of the
accelerometer.
Logic output pin to indicate fault.
The power supply ground.
The power supply input.
Used for factory trim. Leave
unconnected.
No internal connection. Leave
unconnected.
Power Supply
Figure 6. Recommended PCB Layout for Interfacing
Accelerometer to Microcontroller
NOTES:
1. Use a 0.1
F
capacitor on V
DD
to decouple the power
source.
2. Physical coupling distance of the accelerometer to the
microcontroller should be minimal.
3. Place a ground plane beneath the accelerometer to
reduce noise, the ground plane should be attached to
all of the open ended terminals shown in
Figure 6.
4. Use an RC filter of 1 k and 0.01
F
on the output of
the accelerometer to minimize clock noise (from the
switched capacitor filter circuit).
5. PCB layout of power and ground should not couple
power supply noise.
6. Accelerometer and microcontroller should not be a
high current path.
V
DD
Logic
Input
4
MMA2300KEG
ST
V
OUT
6
R1
1 k
STATUS
Output
Signal
8 V
DD
5
7. A/D sampling rate and any external power supply
switching frequency should be selected such that they
do not interfere with the internal accelerometer
sampling frequency. This will prevent aliasing errors.
C1
0.1
F
7 V
SS
C2
0.01
F
Figure 5. SOIC Accelerometer with Recommended
Connection Diagram
MMA2300KEG
Sensors
Freescale Semiconductor, Inc.
5
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