MP1531
Low Power, Triple Output Step-Up
Plus Charge Pump for TFT Bias
The Future of Analog IC Technology
DESCRIPTION
The MP1531 is a triple output step-up converter
with charge-pumps to make a complete DC/DC
converter to power a TFT LCD panel from a
2.7V to 5.5V supply.
The MP1531 includes a 250kHz fixed frequency
step-up converter and a positive and negative
linear regulator. The linear regulators are
powered via charge-pumps driven by the step-up
converter switch node.
A single on/off control enables all 3 outputs.
The outputs are internally sequenced at
power-on for ease of use. An internal soft-start
prevents overloading the input source at
startup. Cycle-by-cycle current limit reduces
component stress.
The MP1531 is available in both a tiny 16-pin
QFN package (3x3mm) and a 16-pin TSSOP
package.
FEATURES
2.7V to 5.5V Operating Input Range
500mA Switch Current Limit
3 Outputs in a Single Package
Step-Up Converter up to 22V
Positive 10mA Linear Regulator
Negative 10mA Linear Regulator
250mΩ Internal Power MOSFET Switch
95% Efficiency
1μA Shutdown Mode
Fixed 250kHz Frequency
Positive Regulator up to 38V
Negative Regulator down to -20V
Internal Power-On Sequencing
Adjustable Soft-Start/Fault Timer
Thermal Shutdown
Cycle-By-Cycle Over Current Protection
Under Voltage Lockout
Ready Flag
16-Pin TSSOP and QFN (3x3mm)
Packages
TFT LCD Displays
Portable DVD Players
Tablet PCs
Car Navigation Displays
EVALUATION BOARD REFERENCE
Board Number
EV1531DQ-002A
Dimensions
2.3”X x 2.3”Y x 0.5”Z
APPLICATIONS
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“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
V
IN
2.7V-4.2V
Efficiency vs
Load Current
100
90
V
IN
= 4.2V
V
IN
= 3.3V
EFFICIENCY (%)
OFF ON
TO
SW
EN CT RDY IN
SW
COMP
FB1
V
MAIN
5V
80
70
60
50
40
30
20
0
IN2
MP1531
V
GL
-4V
IN3
GL
FB2
REF
GND
GH
FB3
PGND
V
GH
12V
V
MAIN
= 5V
100 200 300 400 500 600
LOAD CURRENT (mA)
MP1531 Rev. 1.31
5/25/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
1
MP1531 – LOW POWER, TRIPLE OUTPUT STEP-UP PLUS CHARGE PUMP FOR TFT BIAS
ORDERING INFORMATION
Part Number
MP1531DQ*
MP1531DM**
Package
QFN16 (3x3mm)
TSSOP16
Top Marking
B6
M1531DM
Free Air Temperature (T
A
)
-40C to +85C
-40C to +85C
* For Tape & Reel, add suffix –Z (g. MP1531DQ–Z).
For RoHS compliant packaging, add suffix –LF (e.g. MP1531DQ–LF–Z)
*
*For
Tape & Reel, add suffix –Z (g. MP1531DM–Z).
For RoHS compliant packaging, add suffix –LF (e.g. MP1531DM–LF–Z)
PACKAGE REFERENCE
PIN 1 ID
PGND
16
SW
CT
RDY
FB1
1
2
3
4
5
COMP
6
IN
7
GND
8
REF
TOP VIEW
IN3
15
GH
14
IN2
13
12
11
10
9
GL
EN
FB3
FB2
TOP VIEW
RDY
FB1
COMP
IN
GND
REF
FB2
FB3
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CT
SW
PGND
IN3
GH
IN2
GL
EN
EXPOSED PAD
CONNECT TO PIN 13
QFN16
TSSOP16
ABSOLUTE MAXIMUM RATINGS
(1)
IN Supply Voltage .......................... –0.3V to +6V
SW Voltage .................................. –0.3V to +25V
IN2, GL Voltage ........................... +0.3V to –25V
IN3, GH Voltage ........................... –0.3V to +40V
IN2 to IN3 Voltage ....................... –0.3V to +60V
All Other Pins ................................. –0.3V to +6V
(2)
Continuous Power Dissipation (T
A
= +25°C)
QFN16 (3 x 3mm)…………………………....2.1W
TSSOP16
………………… ………....1.4W
Junction Temperature ...............................125°C
Lead Temperature ....................................260°C
Storage Temperature ............. –65°C to +150°C
IN3, GH Voltage .................................. 0V to 38V
Maximum Junction Temp. (T
J
) ............... +125C
Thermal Resistance
(3)
QFN16 .................................... 60 ..... 120 ..
C/W
TSSOP16 ................................ 90 ...... 30 ...
C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature T
J
(MAX), the junction-to-
ambient thermal resistance
θ
JA
, and the ambient temperature
T
A
. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by P
D
(MAX) = (T
J
(MAX)-T
A
)/θ
JA
. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on approximately 1” square of 1 oz copper.
θ
JA
θ
JC
Recommended Operating Conditions
(2)
Input Voltage ................................... 2.7V to 5.5V
Main Output Voltage ...........................V
IN
to 22V
IN2, GL Voltage ................................ 0V to –20V
MP1531 Rev. 1.31
5/25/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
2
MP1531 – LOW POWER, TRIPLE OUTPUT STEP-UP PLUS CHARGE PUMP FOR TFT BIAS
ELECTRICAL CHARACTERISTICS
(5)
V
IN
= 5.0V, T
A
= +25C, unless otherwise noted.
Parameter
Input Voltage Range
IN Undervoltage Lockout Threshold
IN Undervoltage Lockout Hysteresis
IN Shutdown Current
IN Quiescent Current
EN Input High Voltage
EN Input Low Voltage
EN Hysteresis
EN Input Bias Current
Oscillator
Switching Frequency
Maximum Duty Cycle
Soft-Start Period
Turn-Off Delay
Error Amplifier
Error Amplifier Voltage Gain
Error Amplifier Transconductance
COMP Maximum Output Current
FB1, FB3 Regulation Voltage
FB2 Regulation Voltage
FB1, FB3 Input Bias Current
FB2 Input Bias Current
Reference (REF)
REF Regulation Voltage
REF Load Regulation
Output Switch (SW)
SW On Resistance
SW Current Limit
SW Leakage Current
GL Dropout Voltage
(6)
GH Dropout Voltage
(6)
GL Leakage Current
GH Leakage Current
Thermal Shutdown
I
LIM
V
SW
= 22V
V
GL
= –10V, I
GL
= 10mA
V
GH
= 20V, I
GH
= 10mA
V
IN2
= –15V, V
GL
= GND
V
IN3
= 25V, V
GH
= GND
Symbol Condition
V
IN
V
UVLO
IN Rising
V
EN
< 0.3V
V
EN
> 2V, V
FB1
= 1.4V
EN Rising
Min
2.7
2.25
Typ
Max
5.5
2.65
1
1.6
0.3
100
1
f
SW
D
M
C4 = 10nF
Av
EA
Gm
EA
1.22
–25
V
FB1
= V
FB3
= 1.25V
V
FB2
= 0V
I
REF
= 50μA
0μA < I
REF
< 200μA
V
IN
= 5V
V
IN
= 3V
0.5
1.22
200
85
250
90
6
3
400
1000
±100
1.25
0
±100
±100
1.25
1
250
400
0.65
0.5
300
Units
V
V
mV
μA
mA
V
V
mV
μA
kHz
%
ms
μs
V/V
μA/V
μA
V
mV
nA
nA
V
%
mΩ
mΩ
A
µA
V
V
µA
µA
C
100
0.5
1.2
1.6
V
EN-HIGH
1.28
+25
1.28
1.2
1
0.15
0.5
1
1
160
Notes:
5) Typical values are guaranteed by design, not production tested.
6) Dropout voltage is the input to output differential at which the circuit ceases to regulate against further reduction in input voltage.
MP1531 Rev. 1.31
5/25/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
3
MP1531 – LOW POWER, TRIPLE OUTPUT STEP-UP PLUS CHARGE PUMP FOR TFT BIAS
TYPICAL PERFORMANCE CHARACTERISTICS
Circuit of Figure 3, unless otherwise noted.
Load Transient
Power-Up Sequencing
V
IN
= 3.3V, V
MAIN
= 5V, I
MAIN
= 100mA,
V
GH
= 15V, I
GH
= 5mA, V
GL
= -10V,
I
GL
= 5mA
Efficiency vs Load Current
Delivered by Step-Up Converter
100
90
V
IN
= 4.2V
V
IN
= 3.3V
V
MAIN
50mV/div
V
IN
= 3.3V, V
MAIN
= 5V,
5mA-50mA Step, V
GH
= 15V,
I
GH
= 5mA, V
GL
= -10V, I
GL
= 5mA
EFFICIENCY (%)
80
70
60
50
40
30
20
0
V
EN
5V/div
V
MAIN
5V/div
V
GH
10V/div
V
GL
10V/div
I
MAIN
50mA/div
V
MAIN
= 5V
100 200 300 400 500 600
LOAD CURRENT (mA)
10ms/div
MP1531 Rev. 1.31
5/25/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
4
MP1531 – LOW POWER, TRIPLE OUTPUT STEP-UP PLUS CHARGE PUMP FOR TFT BIAS
PIN FUNCTIONS
QFN16 TSSOP16
Name Description
Pin #
Pin #
Step-Up Converter Power Switch Node. Connect an inductor between the input source
1
15
SW and SW, and connect a rectifier from SW to the main output to complete the step-up
converter. SW is the drain of the internal 250mΩ N-Channel MOSFET switch.
Timing Capacitor for Soft-Start and Power-On Sequencing. A capacitor from CT to
2
16
CT GND controls the soft-start and sequencing turn-on delay periods. See Power-On
Sequencing and Start-Up Timing Diagram.
Regulators Not Ready. This pin is an open drain output, and an external 100kΩ
pull-up resistor is required for proper operation. During startup
RDY
will be high
impedance. Once the turn-on sequence is complete, this pin will be pulled low if all
FB voltages exceed 80% of their specified thresholds. After all regulators are
turned-on, a fault in any regulator that causes the respective FB voltage to fall
3
1
RDY
4
5
6
7
8
2
3
4
5
6
9
7
10
8
11
9
12
10
13
11
below 80% of its threshold will cause
RDY
to go high after approximately 15µs. If
the fault persists for more than approximately 6ms (for C4 = 10nF), the entire chip
will shut down. See Fault Sensing and Timer.
Step-Up Converter Feedback Input. FB1 is the inverting input of the internal error
FB1 amplifier. Connect a resistive voltage divider from the output of the step-up
converter to FB1 to set the step-up converter output voltage.
Step-Up Converter Compensation Node. COMP is the output of the error amplifier. Connect
COMP
a series RC network to compensate the regulation control loop of the step-up converter.
Internal Power Input. IN supplies the power to the MP1531. Bypass IN to PGND
IN
with a 10µF or greater capacitor.
GND Signal Ground.
Reference Output. REF is the 1.25V reference voltage output. Bypass REF to GND
REF with a 0.1µF or greater capacitor. Connect REF to the low-side resistor of the
negative linear regulator feedback string.
Negative Linear Regulator Feedback Input. Connect the FB2 feedback resistor
FB2 string between GL and REF to set the negative linear regulator output voltage. FB2
regulation threshold is GND.
Positive Linear Regulator Feedback Input. Connect the FB3 feedback resistor string
FB3 between GH and GND to set the positive linear regulator output voltage. FB3
regulation threshold is 1.25V.
On/Off Control Input. Drive EN high to turn on the MP1531, drive EN low to turn it
off. For automatic startup, connect EN to IN. Once the MP1531 is turned on, it
EN
sequences the outputs on (See Power-On Sequencing). When turned off, all
outputs are immediately disabled.
Negative Linear Regulator Output. GL is the output of the negative linear regulator.
GL GL can supply up to 10mA to the load. Bypass GL to GND with a 1µF or greater,
low-ESR, ceramic capacitor.
Negative Linear Regulator Input. IN2 is the input of the negative linear regulator. Drive
IN2 IN2 with an inverting charge pump powered from SW. IN2 can go as low as –20V. For
QFN package, connect the exposed pad to IN2 pin.
MP1531 Rev. 1.31
5/25/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
5
