Freescale Semiconductor
Data Sheet: Product Preview
Document Number: MPC5553
Rev. 2,
03/2007
MPC5553
Microcontroller Data Sheet
by: Microcontroller Division
This document provides electrical specifications, pin
assignments, and package diagrams for the MPC5553
microcontroller device. For functional characteristics,
refer to the MPC5553/MPC5554
Microcontroller
Reference Manual.
Contents
1
2
3
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.2 Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . 6
3.3 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.4 Electromagnetic Interference Characteristics . . . . . 9
3.5 ESD Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 9
3.6 VRC/POR Electrical Specifications . . . . . . . . . . . . 10
3.7 Power-Up/Down Sequencing . . . . . . . . . . . . . . . . 11
3.8 DC Electrical Specifications. . . . . . . . . . . . . . . . . . 13
3.9 Oscillator and FMPLL Electrical Characteristics . . 20
3.10 eQADC Electrical Characteristics . . . . . . . . . . . . . 22
3.11 H7Fa Flash Memory Electrical Characteristics . . . 23
3.12 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.13 AC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.14 Fast Ethernet AC Timing Specifications . . . . . . . . 46
Mechanicals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
4.1 Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
4.2 Package Dimensions. . . . . . . . . . . . . . . . . . . . . . . 56
1
Overview
The MPC5553 microcontroller (MCU) is a member of
the MPC5500 family of microcontrollers built on the
Power Architecture™ embedded technology. This
family of parts contains many new features coupled with
high performance CMOS technology to provide
substantial reduction of cost per feature and significant
performance improvement over the MPC500 family.
The host processor core of this device complies with the
Power Architecture embedded category that is 100%
user-mode compatible (with floating point library) with
the original Power PC™ user instruction set architecture
(UISA). The embedded architecture has enhancements
that improve the performance in embedded applications.
This core also has additional instructions, including
digital signal processing (DSP) instructions, beyond the
original Power PC instruction set. This family of parts
4
© Freescale Semiconductor, Inc., 2007. All rights reserved.
Overview
contains many new features coupled with high performance CMOS technology to provide significant
performance improvement over the MPC565.
The MPC5553 of the MPC5500 family has two levels of memory hierarchy. The fastest accesses are to the
8-kilobyte unified cache. The next level in the hierarchy contains the 64-kilobyte on-chip internal SRAM
and 1.5 Mbyte internal Flash memory. The internal SRAM and flash memory can hold instructions and
data. The external bus interface has been designed to support most of the standard memories used with the
MPC5xx family.
The complex input/output timer functions of the MPC5500 family are performed by an enhanced time
processor unit engine (eTPU). The eTPU engine controls 32 hardware channels. The eTPU has been
enhanced over the TPU by providing 24-bit timers, double-action hardware channels, variable number of
parameters per channel, angle clock hardware, and additional control and arithmetic instructions. The
eTPU can be programmed using a high-level programming language.
The less complex timer functions of the MPC5500 family are performed by the enhanced modular
input/output system (eMIOS). The eMIOS’ 24 hardware channels are capable of single-action,
double-action, pulse-width modulation (PWM), and modulus-counter operations. Motor control
capabilities include edge-aligned and center-aligned PWM.
Off-chip communication is performed by a suite of serial protocols including controller area networks
(FlexCANs), enhanced deserial/serial peripheral interfaces (DSPI), and enhanced serial communications
interfaces (eSCIs). The DSPIs support pin reduction through hardware serialization and deserialization of
timer channels and general-purpose input/output (GPIO) signals.
The MCU of the MPC5553 has an on-chip 40-channel enhanced queued dual analog-to-digital converter
(eQADC).
The system integration unit (SIU) performs several chip-wide configuration functions. Pad configuration
and general-purpose input and output (GPIO) are controlled from the SIU. External interrupts and reset
control are also determined by the SIU. The internal multiplexer submodule (SIU_DISR) provides
multiplexing of eQADC trigger sources, daisy chaining the DSPIs, and external interrupt signal
multiplexing.
The Fast Ethernet (FEC) module is a RISC-based controller that supports both 10 and 100 Mbps
Ethernet/IEEE® 802.3 networks and is compatible with three different standard MAC (media access
controller) PHY (physical) interfaces to connect to an external Ethernet bus. The FEC supports the 10 or
100 Mbps MII (media independent interface), and the 10 Mbps-only with a seven-wire interface, which
uses a subset of the MII signals. The upper 16-bits of the 32-bit external bus interface (EBI) are used to
connect to an external Ethernet device. The FEC contains built-in transmit and receive message FIFOs and
DMA support.
MPC5553 Microcontroller Data Sheet, Rev. 2.0
2
Freescale Semiconductor
Ordering Information
2
Ordering Information
M PC 5553 M ZP 80 R2
Qualification status
Core code
Device number
Temperature range
Package identifier
Operating frequency (MHz)
Tape and reel status
Temperature Range
M = –40° C to 125° C
Package Identifier
ZP = 416PBGA SnPb
VR = 416PBGA Pb-free
VF = 208MAPBGA SnPb
VM = 208MAPBGA Pb-free
ZQ = 324PBGA SnPb
VZ = 324PBGA Pb-free
Operating Frequency
80 = 80 MHz
112 = 112 MHz
132 = 132 MHz
Tape and Reel Status
R2 = Tape and seel
(blank) = Trays
Note:
Not all options are available on all devices. Refer to
Table 1.
Qualification Status
P = Pre qualification
M = Full spec qualified
Figure 1. MPC5500 Family Part Number Example
Table 1. Orderable Part Numbers
Speed (MHz)
Freescale Part Number
1
Package Description
Nominal
MPC5553MVR132
MPC5553MVR112
MPC5553MVR80
MPC5553MVZ132
MPC5553MVZ112
MPC5553MVZ80
MPC5553MVM132
MPC5553MVM112
MPC5553MVM80
MPC5553MZP132
MPC5553MZP112
MPC5553MZP80
MPC5553MZQ132
MPC5553MZQ112
MPC5553MZQ80
MPC5553 Lead 324 package
MPC5553 Lead 416 package
MPC5553 Lead-free 208 package
MPC5553 Lead-free 324 package
MPC5553 Lead-free 416 package
132
112
80
132
112
80
132
112
80
132
112
80
132
112
80
Max
3
(f
MAX
)
132
114
82
132
114
82
132
114
82
132
114
82
132
114
82
–40° C
125° C
–40° C
125° C
–40° C
125° C
–40° C
125° C
–40° C
125° C
Min (T
L
)
Max (T
H
)
Operating Temperature
2
MPC5553 Microcontroller Data Sheet, Rev. 2.0
Freescale Semiconductor
3
Electrical Characteristics
Table 1. Orderable Part Numbers (continued)
Speed (MHz)
Freescale Part Number
1
Package Description
Nominal
MPC5553MVF132
MPC5553MVF112
MPC5553MVF80
1
Operating Temperature
2
Min (T
L
)
Max (T
H
)
Max
3
(f
MAX
)
132
114
82
132
MPC5553 Lead 208 package
112
80
–40° C
125° C
All devices are PPC5553, rather than MPC5553, until the product qualifications. Not all configurations are available in the PPC
parts.
2
The lowest operating temperature is referenced by T
L
; the highest operating temperature is referenced by T
H
.
3
Speed is the nominal maximum frequency. Max speed is the maximum speed allowed including any frequency modulation.
80 MHz parts allow for 80 MHz + 2% modulation. However, 132 MHz devices allow 128 MHz plus two percent frequency
modulation only.
3
Electrical Characteristics
This section contains detailed information on power considerations, DC/AC electrical characteristics, and
AC timing specifications for the MCU.
3.1
Maximum Ratings
Table 2. Absolute Maximum Ratings
1
Spec
1
2
3
4
5
6
7
8
9
10
11
12
Characteristic
1.5 V core supply voltage
3
Flash program/erase voltage
Flash core voltage
Flash read voltage
SRAM standby voltage
Clock synthesizer voltage
3.3 V I/O buffer voltage
Voltage regulator control input voltage
Analog supply voltage (reference to V
SSA
)
I/O supply voltage (fast I/O pads)
4
I/O supply voltage (slow and medium I/O pads)
4
DC input voltage
5
V
DDEH
powered I/O pads
V
DDE
powered I/O pads
Analog reference high voltage (reference to V
RL
)
V
SS
differential voltage
V
DD
differential voltage
V
REF
differential voltage
Symbol
V
DD
V
PP
V
DDF
V
FLASH
V
STBY
V
DDSYN
V
DD33
V
RC33
V
DDA
V
DDE
V
DDEH
V
IN
Min
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–1.0
6
–1.0
6
–0.3
–0.1
–V
DDA
–0.3
Max
2
1.7
6.5
1.7
4.6
1.7
4.6
4.6
4.6
5.5
4.6
6.5
6.5
7
4.6
8
5.5
0.1
V
DD
5.5
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
13
14
15
16
V
RH
V
SS
– V
SSA
V
DD
– V
DDA
V
RH
– V
RL
MPC5553 Microcontroller Data Sheet, Rev. 2.0
4
Freescale Semiconductor
Electrical Characteristics
Table 2. Absolute Maximum Ratings
1
(continued)
Spec
17
18
19
20
21
22
23
24
25
26
27
28
29
1
Characteristic
V
RH
to V
DDA
differential voltage
V
RL
to V
SSA
differential voltage
V
DDEH
to V
DDA
differential voltage
V
DDF
to V
DD
differential voltage
This spec has been moved to
Table 9,
spec 43a.
V
SSSYN
to V
SS
differential voltage
V
RCVSS
to V
SS
differential voltage
Maximum DC digital input current
9
(per pin, applies to all digital pins)
5
Maximum DC analog input current
10
(per pin, applies to all analog pins)
Maximum operating temperature range
11
Die junction temperature
Storage temperature range
Maximum solder temperature
12
Moisture sensitivity level
13
Symbol
V
RH
– V
DDA
V
RL
– V
SSA
V
DDEH
– V
DDA
V
DDF
– V
DD
V
SSSYN
– V
SS
V
RCVSS
– V
SS
I
MAXD
I
MAXA
T
J
T
STG
T
SDR
MSL
Min
–5.5
–0.3
–V
DDA
–0.3
Max
2
5.5
0.3
V
DDEH
0.3
Unit
V
V
V
V
–0.1
–0.1
–2
–3
T
L
–55.0
—
—
0.1
0.1
2
3
150.0
150.0
260.0
3
V
V
mA
mA
o
C
o
C
o
C
Functional operating conditions are given in the DC electrical specifications. Absolute maximum ratings are stress ratings only,
and functional operation at the maxima is not guaranteed. Stress beyond the listed maxima can affect device reliability or cause
permanent damage to the device.
2
Absolute maximum voltages are currently maximum burn-in voltages. Absolute maximum specifications for device stress have
not yet been determined.
3
1.5 V +/– 10% for proper operation. This parameter is specified at a maximum junction temperature of 150
o
C.
4
All functional non-supply I/O pins are clamped to V
SS
and V
DDE
, or V
DDEH
.
5
AC signal overshoot and undershoot of up to +/– 2.0 V of the input voltages is permitted for an accumulative duration of
60 hours over the complete lifetime of the device (injection current not limited for this duration).
6
Internal structures hold the voltage greater than –1.0 V if the injection current limit of 2 mA is met. Keep the negative DC
current greater than –0.6 V on eTPUB[15] and SINB during the internal power-on reset (POR) state.
7
Internal structures hold the input voltage less than the maximum voltage on all pads powered by V
DDEH
supplies, if the
maximum injection current specification is met (2 mA for all pins) and V
DDEH
is within the operating voltage specifications.
8
Internal structures hold the input voltage less than the maximum voltage on all pads powered by V
DDE
supplies, if the maximum
injection current specification is met (2 mA for all pins) and V
DDE
is within the operating voltage specifications.
9
Total injection current for all pins (including both digital and analog) must not exceed 25 mA.
10
Total injection current for all analog input pins must not exceed 15 mA.
11
Lifetime operation at these specification limits is not guaranteed.
12
Solder profile per CDF-AEC-Q100.
13
Moisture sensitivity per JEDEC test method A112.
MPC5553 Microcontroller Data Sheet, Rev. 2.0
Freescale Semiconductor
5
