FEDR27V25653L-002-01
Issue Date: Oct. 01, 2008
MR27V25653L
16M–Word
×
16–Bit or 32M–Word
×
8–Bit Page Mode
P2ROM
PIN CONFIGURATION (TOP VIEW)
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A23
NC
NC
NC
NC
NC
GND
NC
NC
NC
NC
NC
BYTE#
A0
D0
D8
D1
D9
Vcc
D2
D10
D3
D11
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
70
CE#
69
A12
68
A13
67
A14
66
A15
65
Vcc
64
A16
63
A17
62
A18
61
A19
60
A20
59
A21
58
NC
57
NC
56
NC
55
NC
54
NC
FEATURES
· 16,777,216-word
×
16-bit / 33,554,432-word
×
8-bit
electrically switchable configuration
· Page size of 8-word x 16-Bit or 16-word x 8-Bit
· 3.0 V to 3.6 V power supply
· Random Access time
100 ns MAX
· Page Access time
35 ns MAX
· Operating current
60 mA MAX
· Standby current
5 mA MAX
· Input/Output TTL compatible
· Three-state output
PACKAGES
· MR27V25653L-xxxMB
70-pin plastic SSOP (SSOP70-P-500-0.80-K)
70SSOP
53
GND
52
NC
51
NC
50
NC
49
NC
48
NC
47
A22
46
NC
45
OE#
44
D15/A-1
43
D7
42
D14
41
D6
40
D13
39
D5
38
D12
37
D4
36
Vcc
P2ROM ADVANCED TECHNOLOGY
P2ROM stands for Production Programmed ROM. This
exclusive LAPIS Semiconductor technology utilizes factory
test equipment for programming the customers code into the
P2ROM prior to final production testing. Advancements in this
technology allows production costs to be equivalent to
MASKROM and has many advantages and added benefits over
the other non-volatile technologies, which include the
following;
· Short lead time,
since the P2ROM is programmed at the final
stage of the production process, a large P2ROM inventory
"bank system" of un-programmed packaged products are
maintained to provide an aggressive lead-time and minimize
liability as a custom product.
· No mask charge,
since P2ROMs do not utilize a custom mask for storing customer code, no mask charges apply.
· No additional programming charge,
unlike Flash and OTP that require additional programming and handling
costs, the P2ROM already has the code loaded at the factory with minimal effect on the production throughput.
The cost is included in the unit price.
· Custom Marking is
available at no additional charge.
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FEDR27V25653L-002-01
MR27V25653L/ P2ROM
BLOCK DIAGRAM
A–1
× 8 / × 16 Switch
CE#
CE
OE#
OE
BYTE#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
Row Decoder
Memory Cell Matrix
16M × 16-Bit or 32M × 8-Bit
Address Buffer
Column Decoder
Multiplexer
Output Buffer
D0
D1
D2
D3
D4
D5
D6
D7
D8
D10
D9
D12
D14
D15
D11
D13
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
PIN DESCRIPTIONS
Pin name
D15 / A–1
A0 to A23
D0 to D14
CE#
OE#
BYTE#
V
CC
V
SS
NC
Functions
Data output / Address input
Address inputs
Data outputs
Chip enable input
Output enable input
Word / Byte select input
Power supply voltage
Ground
No connect
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FEDR27V25653L-002-01
MR27V25653L/ P2ROM
FUNCTION TABLE
Mode
Read (16-Bit)
Read (8-Bit)
Output disable
Standby
CE#
L
L
L
H
OE#
L
L
H
∗
BYTE#
H
L
H
L
H
L
V
CC
D0 to D7
D
OUT
D8 to D14
D
OUT
Hi–Z
Hi–Z
Hi–Z
D15/A–1
L/H
∗
∗
3.0 V
to
3.6 V
∗:
Don’t Care (H or L)
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating temperature under bias
Storage temperature
Input voltage
Output voltage
Power supply voltage
Power dissipation per package
Output short circuit current
Symbol
Ta
Tstg
V
I
V
O
V
CC
P
D
I
OS
Condition
—
Value
0 to 70
–55 to 125
–0.5 to V
CC
+0.5
–0.5 to V
CC
+0.5
–0.5 to 5
1.0
10
Unit
°C
°C
V
V
V
W
mA
Relative to V
SS
Ta = 25°C
—
RECOMMENDED OPERATING CONDITIONS
Parameter
V
CC
power supply voltage
Input “H” level
Input “L” level
Symbol
V
CC
V
IH
V
IL
Condition
V
CC
= 3.0 to 3.6 V
Min.
3.0
2.2
–0.5∗∗
Typ.
—
—
—
(Ta = 0 to 70°C)
Max.
Unit
3.6
V
V
CC
+0.5∗
V
0.6
V
Voltage is relative to VSS.
∗
: Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.
∗∗
: -1.5V(Min.) when pulse width of undershoot is less than 10ns.
PIN CAPACITANCE
Parameter
Input
BYTE#
Output
Symbol
C
IN1
C
IN2
C
OUT
Condition
V
I
= 0 V
V
O
= 0 V
Min.
—
—
—
(V
CC
= 3.3 V, Ta = 25°C, f = 1 MHz)
Typ.
Max.
Unit
—
10
pF
—
200
—
10
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FEDR27V25653L-002-01
MR27V25653L/ P2ROM
ELECTRICAL CHARACTERISTICS
DC Characteristics
(V
CC
= 3.0 V to 3.6 V, Ta = 0 to 70°C)
Min.
Typ.
Max.
Unit
—
—
5
μA
—
—
5
μA
—
—
5
mA
—
—
5
mA
—
2.2
–0.5∗∗
2.4
—
—
—
—
—
—
60
V
CC
+0.5
∗
0.6
—
0.4
mA
V
V
V
V
Parameter
Input leakage current
Output leakage current
V
CC
power supply current
(Standby)
V
CC
power supply current
(Read)
Input “H” level
Input “L” level
Output “H” level
Output “L” level
Symbol
I
LI
I
LO
I
CCSC
I
CCST
I
CCA1
V
IH
V
IL
V
OH
V
OL
Condition
V
I
= 0 to V
CC
V
O
= 0 to V
CC
CE# = V
CC
CE# = V
IH
CE# = V
IL
, OE# = V
IH
f=5MHz
—
—
I
OH
= –1 mA
I
OL
= 2 mA
Voltage is relative to V
SS
.
∗
: Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.
∗∗
: -1.5V(Min.) when pulse width of undershoot is less than 10ns.
AC Characteristics
(V
CC
= 3.0 V to 3.6 V, Ta = 0 to 70°C)
Min.
Max.
Unit
100
—
ns
—
100
ns
35
—
ns
—
35
ns
—
100
ns
—
30
ns
0
20
ns
0
20
ns
0
—
ns
Parameter
Address cycle time
Address access time
Page cycle time
Page access time
CE# access time
OE# access time
Output disable time
Output hold time
Symbol
t
C
t
ACC
t
PC
t
PAC
t
CE
t
OE
t
CHZ
t
OHZ
t
OH
Condition
—
CE# = OE# = V
IL
—
—
OE# = V
IL
CE# = V
IL
OE# = V
IL
CE# = V
IL
CE# = OE# = V
IL
Measurement conditions
Input signal level ---------------------------------------- 0 V/3 V
Input timing reference level--------------------------- 1/2Vcc
Output load ----------------------------------------------- 50 pF
Output timing reference level ------------------------ 1/2Vcc
Output load
Output
50 pF
(Including scope and jig)
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FEDR27V25653L-002-01
MR27V25653L/ P2ROM
TIMING CHART (READ CYCLE)
Random Access Mode Read Cycle
t
C
Address
t
OH
t
CE
CE#
t
CHZ
t
OE
OE#
t
ACC
Dout
Hi-Z
Valid Data
Valid Data
Hi-Z
t
OHZ
t
OH
t
ACC
t
C
Page Access Mode Read Cycle
t
C
A3 to A23
t
PC
A-1 to A2 (Byte mode)
A0 to A2 (Word mode)
t
CE
CE#
t
OE
OE#
t
ACC
Dout
Hi-Z
Hi-Z
t
PAC
t
PAC
t
OHZ
t
CHZ
t
OH
t
PC
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