Freescale Semiconductor
Data Sheet
Document Number: MR2A16A
Rev. 6, 11/2007
256K x 16-Bit 3.3-V
Asynchronous
Magnetoresistive RAM
Introduction
The MR2A16A is a 4,194,304-bit magnetoresistive
random access memory (MRAM) device
organized as 262,144 words of 16 bits. The
MR2A16A is equipped with chip enable (E), write
enable (W), and output enable (G) pins, allowing
for significant system design flexibility without bus
contention. Because the MR2A16A has separate
byte-enable controls (LB and UB), individual bytes
can be written and read.
MRAM is a nonvolatile memory technology that
protects data in the event of power loss and does
not require periodic refreshing. The MR2A16A is
the ideal memory solution for applications that
must permanently store and retrieve critical data
quickly.
The MR2A16A is available in a 400-mil, 44-lead
plastic small-outline TSOP type-II package with an
industry-standard center power and ground SRAM
pinout.
The MR2A16A is available in Commercial (0˚C to
70˚C), Industrial (
-
40˚C to 85˚C) and Extended
(
-
40˚C to 105˚C) ambient temperature ranges.
Features
•
•
MR2A16A
44-TSOP
Case 924A-02
Single 3.3-V power supply
Commercial temperature range (0˚C to
70˚C), Industrial temperature range (
-
40˚C
to 85˚C) and Extended temperature range
(
-
40˚C to 105˚C)
Symmetrical high-speed read and write with
fast access time (35 ns)
Flexible data bus control — 8 bit or 16 bit
access
Equal address and chip-enable access
times
Automatic data protection with low-voltage
inhibit circuitry to prevent writes on power
loss
All inputs and outputs are
transistor-transistor logic (TTL) compatible
Fully static operation
Full nonvolatile operation with 20 years
minimum data retention
•
•
•
•
•
•
•
© Freescale Semiconductor, Inc., 2004, 2005, 2006, 2007. All rights reserved.
Device Pin Assignment
OUTPUT
ENABLE
BUFFER
G
UPPER BYTE OUTPUT ENABLE
LOWER BYTE OUTPUT ENABLE
A[17:0] ADDRESS
BUFFERS
18
8
10
ROW
DECODER
COLUMN
DECODER
SENSE
AMPS
UPPER
BYTE
OUTPUT
BUFFER
LOWER
BYTE
OUTPUT
BUFFER
8
FINAL
WRITE
DRIVERS
UPPER
BYTE
WRITE
DRIVER
LOWER
BYTE
WRITE
DRIVER
8
8
E
CHIP
ENABLE
BUFFER
256K x 16
BIT
MEMORY
ARRAY
16
8
8
W
WRITE
ENABLE
BUFFER
8
DQU[15:8]
16
8
UB
LB
BYTE
ENABLE
BUFFER LB
UB
UPPER BYTE WRITE ENABLE
LOWER BYTE WRITE ENABLE
8
DQL[7:0]
Figure 1. Block Diagram
Device Pin Assignment
A0
A1
A2
A3
A4
E
DQL0
DQL1
DQL2
DQL3
V
DD
V
SS
DQL4
DQL5
DQL6
DQL7
W
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A17
A16
A15
G
UB
LB
DQU15
DQU14
DQU13
DQU12
V
SS
V
DD
DQU11
DQU10
DQU9
DQU8
NC
A14
A13
A12
A11
A10
Table 1. Pin Functions
Signal Name
A
E
W
G
UB
LB
DQL
DQU
V
DD
V
SS
NC
Function
Address input
Chip enable
Write enable
Output enable
Upper byte select
Lower byte select
Data I/O, lower byte
Data I/O, upper byte
Power supply
Ground
Do not connect this pin
Figure 2. MR2A16A in 44-Pin TSOP Type II Package
MR2A16A Data Sheet, Rev. 6
2
Freescale Semiconductor
Electrical Specifications
Table 2. Operating Modes
E
1
H
L
L
L
L
L
L
L
L
G
1
X
H
X
L
L
L
X
X
X
W
1
X
H
X
H
H
H
L
L
L
LB
1
X
X
H
L
H
L
L
H
L
UB
1
X
X
H
H
L
L
H
L
L
Mode
Not selected
Output disabled
Output disabled
Lower byte read
Upper byte read
Word read
Lower byte write
Upper byte write
Word write
V
DD
Current
I
SB1
, I
SB2
I
DDR
I
DDR
I
DDR
I
DDR
I
DDR
I
DDW
I
DDW
I
DDW
DQL[7:0]
2
Hi-Z
Hi-Z
Hi-Z
D
Out
Hi-Z
D
Out
D
In
Hi-Z
D
In
DQU[15:8]
2
Hi-Z
Hi-Z
Hi-Z
Hi-Z
D
Out
D
Out
Hi-Z
D
In
D
In
NOTES:
1
H = high, L = low, X = don’t care
2
Hi-Z = high impedance
Electrical Specifications
Absolute Maximum Ratings
This device contains circuitry to protect the inputs against damage caused by high static voltages or
electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage
greater than maximum rated voltages to these high-impedance (Hi-Z) circuits.
The device also contains protection against external magnetic fields. Precautions should be taken to
avoid application of any magnetic field more intense than the maximum field intensity specified in the
maximum ratings.
MR2A16A Data Sheet, Rev. 6
Freescale Semiconductor
3
Electrical Specifications
Table 3. Absolute Maximum Ratings
1
Parameter
Supply voltage
2
Voltage on any pin
2
Output current per pin
Package power dissipation
3
Temperature under bias
MR2A16ATS35C (Commercial - Legacy)
MR2A16AYS35 (Commercial - New)
MR2A16ACYS35 (Industrial)
MR2A16AVYS35 (Extended)
Storage temperature
Lead temperature during solder (3 minute max)
Maximum magnetic field during write
MR2A16ATS35C (Commercial - Legacy)
MR2A16AYS35 (Commercial - New)
MR2A16ACYS35 (Industrial)
MR2A16AVYS35 (Extended)
Maximum magnetic field during read or standby
Symbol
V
DD
V
In
I
Out
P
D
Value
–0.5 to 4.0
–0.5 to V
DD
+ 0.5
±20
0.600
–10 to 85
–10 to 85
–45 to 95
–45 to 110
–55 to 150
260
15
25
25
25
100
Unit
V
V
mA
W
T
Bias
˚C
T
stg
T
Lead
˚C
˚C
H
max_write
Oe
H
max_read
Oe
NOTES:
1
Permanent device damage may occur if absolute maximum ratings are exceeded. Functional operation
should be restricted to recommended operating conditions. Exposure to excessive voltages or magnetic
fields could affect device reliability.
2
All voltages are referenced to V .
SS
3
Power dissipation capability depends on package characteristics and use environment.
MR2A16A Data Sheet, Rev. 6
4
Freescale Semiconductor
Electrical Specifications
Table 4. Operating Conditions
Parameter
Power supply voltage
MR2A16ATS35C (Commercial - Legacy)
MR2A16AYS35 (Commercial - New)
MR2A16ACYS35 (Industrial)
MR2A16AVYS35 (Extended)
Write inhibit voltage
MR2A16ATS35C (Commercial - Legacy)
MR2A16AYS35 (Commercial - New)
MR2A16ACYS35 (Industrial)
MR2A16AVYS35 (Extended)
Input high voltage
Input low voltage
Operating temperature
MR2A16ATS35C (Commercial - Legacy)
MR2A16AYS35 (Commercial - New)
MR2A16ACYS35 (Industrial)
MR2A16AVYS35 (Extended)
Symbol
Min
3.0
1
3.0
2
3.0
2
3.0
2
2.5
2.5
2.5
2.5
2.2
–0.5
4
0
0
-40
-40
Typ
3.3
3.3
3.3
3.3
2.7
2.7
2.7
2.7
—
—
Max
3.6
3.6
3.6
3.6
3.0
1
3.0
2
3.0
2
3.0
2
V
DD
+
0.3
3
0.8
70
70
85
105
Unit
V
DD
V
V
WI
V
V
IH
V
IL
V
V
T
A
˚C
NOTES:
1
After power up or if V
DD
falls below V
WI
, a waiting period of 2
µ
s must be observed, and E and W
must remain high for 2
µ
s. Memory is designed to prevent writing for all input pin conditions if V
DD
falls below minimum V
WI
.
2
After power up or if V
DD
falls below V
WI
, a waiting period of 2 ms must be observed, and E and W
must remain high for 2 ms. Memory is designed to prevent writing for all input pin conditions if V
DD
falls below minimum V
WI
.
3
V (max) = V
IH
DD
+ 0.3 Vdc; V
IH
(max) = V
DD
+ 2.0 Vac (pulse width
≤
10 ns) for I
≤
20.0 mA.
4
V (min) = –0.5 Vdc; V (min) = –2.0 Vac (pulse width
≤
10 ns) for I
≤
20.0 mA.
IL
IL
MR2A16A Data Sheet, Rev. 6
Freescale Semiconductor
5
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