MOSEL VITELIC
MS6264H
8K x 8 HIGH SPEED
CMOS STATIC RAM
MS6264H
Features
s
High-speed – 15/20 ns
s
Low Power dissipation:
— 825mW (Max.) Operating
— 550µW (Max.) Power Down
s
5V ± 10% supply
s
Fully static operation
s
TTL compatible I/O
s
Three state outputs
Description
The MS6264H is a 65,536-bit static random access
memory organized as 8,192 words by 8 bits and operates
from a single 5 volt supply. All inputs and three-state
outputs are TTL compatible and allow for direct interfacing
with common I/O bus system. The MS6264H is available
in the following standard 28-pin packages:
300 MIL Plastic DIP
300 MIL Small Outline J-Bend (SOJ)
Pin Configurations
NC
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
0
DQ
1
DQ
2
V
SS
Functional Block Diagram
1
2
3
4
5
6
7
28
27
26
25
24
23
22
V
CC
W
E
2
A
8
A
9
A
11
G
A
10
E
1
DQ
7
DQ
6
DQ
5
DQ
4
DQ
3
A
3
V
CC
Row
Decoder
128 X 512
Memory Array
V
SS
A
8
A
12
MS6264H
8
9
10
11
12
13
14
21
20
19
18
17
16
15
DQ
0
Column I/O
Input
Data
Circuit
DQ
7
Column Decoder
A
0
E
2
E
1
G
W
A
1
A
2
A
9
A
11
Control
Circuit
MS6264H Rev. 01 11/94
1
MOSEL VITELIC
Pin Descriptions
A
0
–A
12
Address Inputs
These 13 address inputs select one of the 8192 x 8-
bit words in the RAM.
E1
Chip Enable 1 Input
E2
Chip Enable 2 Input
E1
is active LOW and E2 is active HIGH. Both chip
enables must be active to read from or write to the
device. If either chip enable is not active, the device
is deselected and is in a standby power mode. The
DQ pins will be in the high-impedance state when
deselected.
G
Output Enable Input
The output enable input is active LOW. If the output
enable is active while the chip is selected and the
write enable is inactive, data will be present on the
MS6264H
DQ pins. The DQ pins will be in the high impedance
state when
G
is inactive.
W
Write Enable Input
The write enable input is active LOW and controls
read and write operations. With the chip enabled,
when
W
is HIGH and
G
is LOW, output data will be
present at the DQ pins; when
W
is LOW, the data
present on the DQ pins will be written into the
selected memory location.
DQ
0
–DQ
7
Data Input/Output Ports
These 8 bidirectional ports are used to read data
from or write data into the RAM.
V
CC
V
SS
Power Supply
Ground
Truth Table
MODE
Not Selected
(Power Down)
Output Disabled
Read
Write
W
X
X
H
H
L
E
1
H
X
L
L
L
E
2
X
L
H
H
H
G
X
X
H
L
X
I/O OPERATION
High Z
High Z
High Z
D
OUT
D
IN
V
CC
CURRENT
I
CCSB
, I
CCSB1
I
CCSB
, I
CCSB1
I
CC
I
CC
I
CC
Absolute Maximum Ratings
(1)
Symbol
V
CC
V
IN
V
DQ
T
BIAS
T
STG
P
D
I
OUT
Parameter
Supply Voltage
Input Voltage
Input/Output Voltage
Applied
Temperature
Under Bias
Storage
Temperature
Plastic
Plastic
Rating
-0.3 to 7
-0.3 to 7
-0.3 to 6
-10 to +125
-40 to +150
1.0
50
°C
°C
W
mA
V
Unit
Operating Range
RANGE
Commercial
AMBIENT
TEMPERATURE
0°C to +70°C
V
CC
5V
±
10%
Capacitance
(1)
(T
A
= 25°C, f = 1.0 MHz)
Symbol
C
IN
C
DQ
Parameter
Input Capacitance
Input/Output
Capacitance
Conditions
V
IN
= 0V
V
I/O
= 0V
Max.
8
10
Unit
pF
pF
Power Dissipation
DC Output Current
NOTE:
1. Stresses greater than those listed under ABSOLUTE
MAXIMUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at these or any other conditions
above those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect reliability, and degrade performance characteristics.
MS6264H Rev. 01 11/94
NOTE:
1. This parameter is guaranteed and not tested.
2
MOSEL VITELIC
DC Electrical Characteristics (over the commercial operating range)
Parameter
Name
V
IL
V
IH
I
IL
I
OL
V
OL
V
OH
I
CC
I
CCSB
I
CCSB1
Parameter
Guaranteed Input Low
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Operating Power Supply Current
Standby Power Supply Current
Power Down Power Supply
Current
Voltage
(2)
V
CC
= Max, V
= 0V to V
CC
Guaranteed Input High Voltage
(2)
IN
MS6264H
MS6264A
Test Conditions
Min.
–0.3
2.2
-2
-2
—
2.4
15
20
—
—
—
—
—
—
L
(4)
STD
—
V
CC
= Max,
E
1
= V
IH
, or E
2
= V
IL
, or
G
= V
IH
,
V
IN
= 0V t o V
CC
V
CC
= Min, I
OL
= 8mA
V
CC
= Min, I
OH
= –4mA
V
CC
= Max,
E
1
= V
IL
, E
2
= V
IH
, I
DQ
= 0mA,
F = F
m ax (3)
V
CC
= Max,
E
1
= V
IH
, or E
2
= V
IL
, I
DQ
= 0mA
V
CC
= Max,
E
1
≥
V
CC
– 0.2V, E
2
≤
0.2V
V
IN
≥
VCC —0.2V OR V
IN
≤
0.2V
Typ.
(1)
Max.
—
—
—
—
—
—
—
0.8
6.0
2
2
0.4
—
170
165
20
100
3
Unit
V
V
µA
µA
V
V
mA
mA
µA
mA
NOTES:
1. Typical characteristics are at V
CC
= 5V, T
A
= 25°C.
2. These are absolute values with respect to device ground and all overshoots due to system or tester noise are included.
3. F
MAX
= 1/t
RC.
4. Low power version only.
Data Retention Characteristics (over the commercial operating range)
Symbol
V
DR
I
CCDR
I
IL
t
CDR
t
R
Parameter
V
CC
for Data Retention
Data Retention Current
Input Leakage Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
See Retention Waveform
t
RC (2)
—
—
ns
Test Conditions
E
1
≥
V
CC
– 0.2V, or E
2
≤
0.2V,
V
IN
≥
V
CC
– 0.2V or V
IN
≤
0.2V
E
1
≥
V
CC
– 0.2V, or E
2
≤
0.2V,
V
IN
≥
V
CC
– 0.2V or V
IN
≤
0.2V
Min.
2.0
(3)
—
—
0
Typ.
(1)
—
2
—
—
Max.
—
50
(3)
2
—
Unit
V
µA
µA
ns
NOTES:
1. V
CC
= 2V, T
A
= +25°C
2. t
RC
= Read Cycle Time
3. For low power version only
Low V
CC
Data Retention Waveform (E1 Controlled)
V
CC
4.5V
t
CDR
E
1
V
IH
V
DR
2V
Data Retention Mode
4.5V
t
R
V
IH
E
V
DR
– 0.2V
MS6264H Rev. 01 11/94
3
MOSEL VITELIC
Low V
CC
Data Retention Waveform (E2 Controlled)
V
CC
4.5V
E
2
V
IL
E
2
0.2V
t
CDR
V
DR
2V
Data Retention Mode
4.5V
t
R
V
IL
MS6264H
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Timing Reference Level
0V to 3.0V
3ns
1.5V
Key to Switching Waveforms
AC Test Loads and Waveforms
R1 480
Ω
5V
OUTPUT
30pF
INCLUDING
JIG AND
SCOPE
R2
255
Ω
3.0V
GND
3 ns
THEVENIN EQUIVALENT
167
Ω
OUTPUT
ALL INPUT PULSES
90%
10%
90%
10%
3 ns
1.73V
Figure 1.
Figure 2.
AC Electrical Characteristics (over the commercial operating range)
Read Cycle
JEDEC
Parameter Parameter
Name
Name
t
AVAX
t
AVQV
t
ELQV
t
ELQV
t
GLQX
t
EHQZ
t
GLQX
t
EHQZ
t
GHQZ
t
AXQX
t
RC
t
AA
t
ACS1
t
ACS2
t
OE
t
CLZ
t
OLZ
t
CHZ
t
OHZ
t
OH
MS6264A-15 MS6264A-20
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable Access Time
Output Enable to Output Valid
Chip Enable to Output Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
Min.
15
—
—
—
—
5
0
—
—
5
Max.
—
15
15
15
10
—
—
10
10
—
Min.
20
—
—
—
—
5
0
—
—
5
Max.
—
20
20
20
10
—
—
10
10
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MS6264H Rev. 01 11/94
4
MOSEL VITELIC
Switching Waveforms (Read Cycle)
READ CYCLE 1
(1, 2, 4)
t
RC
ADDRESS
t
OH
D
OUT
t
AA
t
OH
MS6264H
Data Valid
READ CYCLE 2
(1, 3, 4)
E
1
t
ACS1
E
2
t
ACS2
t
CLZ
D
OUT
(5)
t
CHZ(5)
Data Valid
READ CYCLE 3
(1)
t
RC
ADDRESS
t
AA
G
t
OE
E
1
t
CLZ1
E
2
t
CLZ2
D
OUT
(5)
(5)
t
OH
t
OLZ
t
ACS1
(1,5)
t
CHZ
t
ACS2
t
OHZ (5)
t
CHZ
(2,5)
Data Valid
NOTES:
1.
W
is high during all read cycles.
2. Device is continuously selected
E
1
= V
IL
and E
2
= V
IH
.
3. Address valid prior to or coincident with
E
1
transition low and /or E
2
transition high.
4.
G
= V
IL.
5. Transition is measured +500mV from steady state with C
L
= 5pF. This parameter is guaranteed and not 100% tested.
MS6264H Rev. 01 11/94
5
单片机
