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MSC1230GS-2K

描述:
Vacuum Fluorescent Driver, 37-Segment, BICMOS, PQFP56, 9 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-56
分类:
文件大小:
141KB,共14页
制造商:
概述
Vacuum Fluorescent Driver, 37-Segment, BICMOS, PQFP56, 9 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-56
器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
LAPIS Semiconductor Co Ltd
Objectid
1774269438
零件包装代码
QFP
包装说明
QFP, QFP56,.53X.57
针数
56
Reach Compliance Code
unknown
ECCN代码
EAR99
compound_id
6609220
数据输入模式
SERIAL
显示模式
DOT MATRIX
接口集成电路类型
VACUUM FLUORESCENT DISPLAY DRIVER
JESD-30 代码
R-PQFP-G56
JESD-609代码
e0
长度
10.5 mm
复用显示功能
NO
功能数量
1
区段数
37
端子数量
56
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
QFP
封装等效代码
QFP56,.53X.57
封装形状
RECTANGULAR
封装形式
FLATPACK
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
8/18 V
认证状态
Not Qualified
座面最大高度
2.25 mm
最大压摆率
13 mA
最大供电电压
18 V
最小供电电压
8 V
标称供电电压
9.5 V
表面贴装
YES
技术
BICMOS
温度等级
INDUSTRIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
GULL WING
端子节距
0.65 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
9.5 mm
最小 fmax
0.25 MHz
文档预览
Dear customers,
About the change in the name such as "Oki Electric Industry Co. Ltd." and
"OKI" in documents to OKI Semiconductor Co., Ltd.
The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI
Semiconductor Co., Ltd. on October 1, 2008.
Therefore, please accept that although
the terms and marks of "Oki Electric Industry Co., Ltd.", “Oki Electric”, and "OKI"
remain in the documents, they all have been changed to "OKI Semiconductor Co., Ltd.".
It is a change of the company name, the company trademark, and the logo, etc. , and
NOT a content change in documents.
October 1, 2008
OKI Semiconductor Co., Ltd.
550-1 Higashiasakawa-cho, Hachioji-shi, Tokyo 193-8550, Japan
http://www.okisemi.com/en/
E2C0024-27-Y4
¡ Semiconductor
¡ Semiconductor
MSC1230
This version: Nov. 1997
MSC1230
Previous version: Jul. 1996
111-Bit 2/3-Duty Controller/Driver with Digital Dimming Function
GENERAL DESCRIPTION
The MSC1230 is a Bi-CMOS display driver with digital dimming function. It enables switching
between 1/3-duty vacuum fluorescent (VF) display tube and universal VF display tube by pin
control.
The MSC1230 consists of a 112-bit shift register, a 111-bit latch, a 10-bit digital dimming circuit,
37 segment drivers, and 3 grid drivers.
The MSC1230 provides an interface with a microcomputer only by three signal lines:
CS,
DATA-IN, and CLOCK.
By using the chip select function, the DATA-IN and CLOCK signal lines can be shared
by other peripheral circuits.
FEATURES
Power supply voltage
: V
DD
=8 V to 18 V (built-in 5 V regulator for logic circuit)
Operating temperature range
: Ta=–40
°C
to +85
°C
37-segment driver outputs
: I
OH
=–6 mA at V
OH
= V
DD
–0.8 V
3-grid driver outputs
: I
OH
=–30 mA at V
OH
= V
DD
–0.8 V
Built-in digital dimming circuit (10-bit resolution)
Switchable between 1/3-duty VF display tube and universal VF display tube*
When SEL pin is left open
: Selects universal VF display tube (The grids GRID1, GRID2,
and GRID1+GRID2 are turned on repeatedly in this order)
When SEL pin is used at 0 V : Selects 1/3-duty VF display tube (The grids GRID1, GRID2,
and GRID3 are turned on repeatedly in this order)
• Built-in oscillation circuit (external R and C)
• Built-in Power-On-Reset circuit
• Package:
56-pin plastic QFP (QFP56-P-910-0.65-2K)(Product name: MSC1230GS-2K)
*
A universal VF display tube is a display tube for which, like a gate array, the user can freely
design characters and patterns on the master layer (grid). (Pattern can be created without gaps
between grids.)
Since the outline dimensions of the display tube and the grid layout are predetermined,
desired patterns can be displayed in a short time.
The universal VF display tube is used for the display parts for audio equipment, household
appliances, and automobile equipment.
1/13
¡ Semiconductor
MSC1230
BLOCK DIAGRAM
SEG37
V
DD1
V
DD2
DGND
5V
REG.
POR
LGND
37
111
CS
Control
Circuit
DATA-IN
CLOCK
112 111
107106
75 74
111-bit Latch
111-bit data
97 96
112-bit Shift Register
10-bit data
10-bit Latch
37
38 37
37
5V
POR
37
111
37-Segment Control
37-bit Segment Driver
37bit data
SEG1
GRID3
GRID1
V
DD
3
3-bit Grid Driver
V
DD
=8 - 18V
1
V
CC
=5.0V
(Regurator)
1
1
10-bit data
OSC0
OSC1
OSC
5V
10-bit Digital
Diming
SEL
112bits=0: Digital Dimming Mode
112bits=1: VF Data Input Mode
Timing
Generator
POR
INPUT AND OUTPUT CONFIGURATION
l
Schematic Diagram 1 of
l
Schematic Diagram 2 of
l
Schematic Diagram of
Logic Portion Input Circuit
Logic Portion Input Circuit
Driver Output Circuit
V
DD
(5V Reg.)
V
DD
(5V Reg.)
V
DD
V
DD
INPUT
COLn
OUTPUT
GND
GND
GND
GND
GND
GND
2/13
¡ Semiconductor
MSC1230
PIN CONFIGURATION (TOP VIEW)
SEG19 1
SEG20 2
SEG21 3
SEG22 4
SEG23 5
SEG24 6
SEG25 7
SEG26 8
SEG27 9
SEG28 10
SEG29 11
SEG30 12
SEG31 13
SEG32 14
SEG33 15
SEG34 16
SEG35 17
SEG36 18
SEG37 19
NC 20
LGND 21
OSC1 23
OSC0 24
SEL 25
NC 22
CS
26
CLOCK 27
NC: No connection
56-Pin Plastic QFP
DATA-IN 28


56 SEG18
55 SEG17
54 SEG16
53 SEG15
46 SEG13
52 SEG14
45 SEG12
44 SEG11
43 SEG10
49 DGND
51 V
DD2
47 V
DD1
50 NC
48 NC
42 SEG9
41 SEG8
40 SEG7
39 SEG6
38 SEG5
37 SEG4
36 SEG3
35 SEG2
34 SEG1
33 NC
32 GRID1
31 GRID2
30 GRID3
29 V
DD3
3/13
¡ Semiconductor
MSC1230
PIN DESCRIPTION
Pin
34 to 46,
52 to 56,
1 to 19
30 to 32
25
Symbol
SEG1 to 37
Type
Decription
O
Output pins for segment signals for driving VF display tube.
GRID1 to 3
SEL
O
I
Output pins for grid signals for driving VF display tube.
The GRID3 output is not used when the universal VF display tube is used.
When at a "L" level, this pin selects 1/3-duty VF display tube.
When at a "H" level (or when used in the open state), this pin selects universal
VF display tube.
Pin for series data input from microprocessor.
Data is input to the shift register on the rising edge of the CLOCK signal.
Serial clock input pin.
Data is input through the DATA-IN pin at the rising edge of the serial clock.
RC oscillator connecting pins.
Connect a resistor between the OSC1 and OSC0 pins and a capacitor between
the OSC0 pin and the ground.
Chip select input pin. Circuit operation is valid when this pin is at a "L" level.
Power supply pins. When using these pins, connect each of them to the power
supply.
Ground pins for driver and logic. These pins can be connected with each other
when they are used.
28
27
DATA-IN
CLOCK
I
I
24
23
26
47
51
29
49
21
OSC0
OSC1
CS
V
DD1
V
DD2
V
DD3
DGND
LGND
I
O
I
4/13
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