Isolated Package for Direct Heat Sinking, Excellent Thermal Conductivity
Avalanche Rated Devices
Interfaces Directly with Most Brushless Motor Drive IC's
55 Volt, 10 Amp Full Three Phase Bridge
DESCRIPTION:
The MSK3003 is a three phase bridge power circuit packaged in a space efficient isolated ceramic tab power SIP
package. Consisting of P-Channel MOSFETs for the top transistors and N-Channel MOSFETs for the bottom transistors, the
MSK3003 will interface directly with most brushless motor drive IC's without special gate driving requirements. The
MSK3003 uses M.S.Kennedy's proven power hybrid technology to bring a cost effective high performance circuit for use
in today's sophisticated servo motor and disk drive systems. The MSK3003 is a replacement for the MPM3003 with only
minor differences in mechanical specifications.
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
Three Phase Brushless DC Motor Servo Control
Disk Drive Spindle Control
Fin Actuator Control
Az-El Antenna Control
1
2
3
4
5
6
1
PIN-OUT INFORMATION
SOURCE 2,4,6
GATE 2
GATE 1
DRAIN 1,2
GATE 4
DRAIN 3,4
12
11
10
9
8
7
SOURCE 1,3,5
SOURCE 1,3,5
GATE 5
DRAIN 5,6
GATE 6
GATE 3
8548-138 Rev. J 10/14
ABSOLUTE MAXIMUM RATINGS
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ELECTRICAL SPECIFICATIONS
Parameter
Drain-Source Breakdown Voltage
Drain-Source Leakage Current
Gate-Source Leakage Current
Gate-Source Threshold Voltage
Drain-Source On Resistance 2
Drain-Source On Resistance 3
Forward Transconductance
N-Channel (Q2,Q4,Q6)
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Rise Time
Fall Time
1
1
1
1
1
1
1
1
1
I
D
=10A
V
DS
=44V
V
GS
=10V
V
DD
=28V
I
D
=10A
R
G
=24Ω
R
D
=2.6Ω
V
GS
=0V
V
DS
=25V
f=1MHz
I
D
=-7.2A
V
DS
=-44V
V
GS
=-10V
V
DD
=-28V
I
D
=-7.2A
1
1
1
R
G
=24Ω
R
D
=3.7Ω
V
GS
=0V
V
DS
=-25V
f=1MHz
I
S
=10A V
GS
=0V (Q2,Q4,Q6)
I
S
=-7.2A V
GS
=0V (Q1,Q3,Q5)
1
1
I
S
=10A di/dt=100A/μS (Q2,Q4,Q6)
I
S
=-7.2A di/dt=100A/μS (Q1,Q3,Q5)
I
S
=10A di/dt=100A/μS (Q2,Q4,Q6)
I
S
=-7.2A di/dt=100A/μS (Q1,Q3,Q5)
1
Test Conditions
4
V
GS
=0 I
D
=0.25mA (All Transistors)
V
DS
=55V V
GS
=0V (Q2,Q4,Q6)
V
DS
=-55V V
GS
=0V (Q1,Q3,Q5)
V
GS
=±20V V
DS
=0 (All Transistors)
V
DS
=V
GS
I
D
=250μA (Q2,Q4,Q6)
V
DS
=V
GS
I
D
=250μA (Q1,Q3,Q5)
V
GS
=10V I
D
=10A (Q2,Q4,Q6)
V
GS
=-10V I
D
=-7.2A (Q1,Q3,Q5)
V
GS
=10V I
D
=10A (Q2,Q4,Q6)
V
GS
=10V I
D
=-7.2A (Q1,Q3,Q5)
V
DS
=25V I
D
=10A (Q2,Q4,Q6)
V
DS
=-25V I
D
=-7.2A (Q1,Q3,Q5)
MSK3003
Min.
55
-
-
-
2.0
-2.0
-
-
-
-
4.5
2.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
4.9
34
19
27
370
140
65
-
-
-
13
55
23
37
350
170
92
1.3
-1.6
56
47
0.12
0.084
Max.
-
25
-25
±100
4.5
-4.5
0.15
0.28
0.07
0.175
-
-
20
5.3
7.6
-
-
-
-
-
-
-
19
5.1
10
-
-
-
-
-
-
-
-
-
83
71
0.18
0.13
Units
V
μA
μA
nA
V
V
Ω
Ω
Ω
Ω
S
S
nC
nC
nC
nS
nS
nS
nS
pF
pF
pF
nC
nC
nC
nS
nS
nS
nS
pF
pF
pF
V
V
nS
nS
μC
μC
Turn-On Delay Time 1
Turn-Off Delay Time
Input Capacitance
Output Capacitance
P-CHANNEL (Q1,Q3,Q5)
Total Gate Charge
1
Gate-Source Charge 1
Gate-Drain Charge 1
Turn-On Delay Time 1
Rise Time
Fall Time
1
1
Turn-Off Delay Time
Input Capacitance
Output Capacitance
BODY DIODE
Forward On Voltage
1
Reverse Transfer Capacitance
Reverse Transfer Capacitance 1
Reverse Recovery Time
Reverse Recovery Charge
NOTES:
1
2
3
4
5
This parameter is guaranteed by design but need not be tested. Typical parameters are representative of actual device performance but are for reference only.
Resistance as seen at package pins.
Resistance for die only; use for thermal calculations.
T
A
=25°C unless otherwise specified.
Internal solder reflow temperature is 180°C, do not exceed.
2
8548-138 Rev. J 10/14
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71mJ
96mJ
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V
DSS
Drain to Source Voltage
V
DGDR
Drain to Gate Voltage
(RGS=1MΩ)
Gate to Source Voltage
V
GS
(Continuous)
Continuous Current
I
D
Pulsed Current
I
DM
Single Pulse Avalanche Energy
(Q1,Q4)
(Q2,Q3)
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55V MAX
55V MAX
±20V MAX
10A MAX
25A MAX
JunctionTemperature
+175°C MAX
5
Storage Temperature Range
-55°C to +150°C
Case Operating Temperature Range -55°C to +125°C
Lead Temperature Range
(10 Seconds Lead Only)
200°C MAX
R
TH-JC
Thermal Resistance (Junction to Case)
P-Channel @ 25°C
9.7°C/W
P-Channel @ 125°C
14.5°C/W
N-Channel @ 25°C
9.7°C/W
N-Channel @ 125°C
14.5°C/W
T
J
T
ST
T
C
T
LD
APPLICATION NOTES
N-CHANNEL GATES (Q2,Q4,Q6)
For driving the N-Channel gates, it is important to keep in mind that it is essentially like driving a capacitance to a sufficient
voltage to get the channel fully on. Driving the gates to +15 volts with respect to their sources assures that the transistors are on.
This will keep the dissipation down to a minimum level [R
DS(ON)
specified in the data sheet]. How quickly the gate gets turned ON and
OFF will determine the dissipation of the transistor while it is transitioning from OFF to ON, and vice-versa. Turning the gate ON and
OFF too slow will cause excessive dissipation, while turning it ON and OFF too fast will cause excessive switching noise in the
system. It is important to have as low a driving impedance as practical for the size of the transistor. Many motor drive IC's have
sufficient gate drive capability for the MSK3003. If not, paralleled CMOS standard gates will usually be sufficient. A series resistor in
the gate circuit slows it down, but also suppresses any ringing caused by stray inductances in the MOSFET circuit. The selection of
the resistor is determined by how fast the MOSFET wants to be switched. See Figure 1 for circuit details.
Figure 1
P-CHANNEL GATES (Q1,Q3,Q5)
Most everything applies to driving the P-Channel gates as the N-Channel gates. The only difference is that the P-Channel gate to
source voltage needs to be negative. Most motor drive IC's are set up with an open collector or drain output for directly interfacing
with the P-channel gates. If not, an external common emitter switching transistor configuration (see Figure 2) will turn the P-
Channel MOSFET on. All the other rules of MOSFET gate drive apply here. For high supply voltages, additional circuitry must be
used to protect the P-Channel gate from excessive voltages.
Figure 2
BRIDGE DRIVE CONSIDERATIONS
It is important that the logic used to turn ON and OFF the various transistors allow sufficient "dead time" between a high side
transistor and its low side transistor to make sure that at no time are they both ON. When they are, this is called "shoot-through", and
it places a momentary short across the power supply. This overly stresses the transistors and causes excessive noise as well. See
Figure 3.
Figure 3
This deadtime should allow for the turn on and turn off time of the transistors, especially when slowing them down with gate
resistors. This situation will be present when switching motor direction, or when sophisticated timing schemes are used for servo
systems such as locked antiphase PWM'ing for high bandwidth operation.
