E2G0009-17-41
¡ Semiconductor
MSM511000C/CL
¡ Semiconductor
This version: Jan. 1998
MSM511000C/CL
Previous version: May 1997
1,048,576-Word
¥
1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE
DESCRIPTION
The MSM511000C/CL is a 1,048,576-word
¥
1-bit dynamic RAM fabricated in Oki's silicon-gate
CMOS technology. The MSM511000C/CL achieves high integration, high-speed operation, and
low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/
single-layer metal CMOS process. The MSM511000C/CL is available in a 26/20-pin plastic SOJ or
20-pin plastic ZIP. The MSM511000CL (the low-power version) is specially designed for lower-
power applications.
FEATURES
• 1,048,576-word
¥
1-bit configuration
• Single 5 V power supply,
±10%
tolerance
• Input
: TTL compatible, low input capacitance
• Output : TTL compatible, 3-state
• Refresh : 512 cycles/8 ms, 512 cycles/64 ms (L-version)
• Fast page mode, read modify write capability
•
CAS
before
RAS
refresh, hidden refresh,
RAS-only
refresh capability
• Package options:
26/20-pin 300 mil plastic SOJ (SOJ26/20-P-300-1.27) (Product : MSM511000C/CL-xxJS)
20-pin 400 mil plastic ZIP
(ZIP20-P-400-1.27)
(Product : MSM511000C/CL-xxZS)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM511000C/CL-45
MSM511000C/CL-50
MSM511000C/CL-60
MSM511000C/CL-70
Access Time (Max.)
t
RAC
45 ns
50 ns
60 ns
70 ns
t
AA
24 ns
26 ns
30 ns
35 ns
t
CAC
14 ns
14 ns
15 ns
20 ns
Cycle Time
Power Dissipation
(Min.)
Operating (Max.) Standby (Max.)
90 ns
100 ns
120 ns
130 ns
468 mW
440 mW
385 mW
330 mW
5.5 mW/
1.1 mW (L-version)
1/15
¡ Semiconductor
PIN CONFIGURATION (TOP VIEW)
D
IN
1
WE
2
RAS
3
NC 4
NC 5
A0 9
A1 10
A2 11
A3 12
V
CC
13
,
26 V
SS
25 D
OUT
24
CAS
23 NC
22 A9
18 A8
17 A7
16 A6
15 A5
14 A4
Pin Name
A0 - A9
RAS
CAS
D
IN
D
OUT
WE
V
CC
V
SS
NC
MSM511000C/CL
A9 1
D
OUT
3
D
IN
5
RAS
7
NC 9
A0 11
A2 13
V
CC
15
A5 17
A7 19
2
CAS
4 V
SS
6
WE
8 NC
NO LEAD
12 A1
14 A3
16 A4
18 A6
20 A8
26/20-Pin Plastic SOJ
20-Pin Plastic ZIP
Function
Address Input
Row Address Strobe
Column Address Strobe
Data Input
Data Output
Write Enable
Power Supply (5 V)
Ground (0 V)
No Connection
2/15
¡ Semiconductor
MSM511000C/CL
BLOCK DIAGRAM
RAS
CAS
Timing
Generator
Timing
Generator
10
Column
Address
Buffers
10
Column
Decoders
Write
Clock
Generator
WE
A0 - A9
Internal
Address
Counter
Refresh
Control Clock
Sense
Amplifiers
I/O
Selector
Output
Buffer
D
OUT
10
Row
Address
Buffers
10
Row
De-
coders
Word
Drivers
Memory
Cells
Input
Buffer
D
IN
V
CC
On Chip
V
BB
Generator
V
SS
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¡ Semiconductor
MSM511000C/CL
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Voltage on Any Pin Relative to V
SS
Short Circuit Output Current
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
T
I
OS
P
D
*
T
opr
T
stg
Rating
–1.0 to 7.0
50
1
0 to 70
–55 to 150
Unit
V
mA
W
°C
°C
*: Ta = 25°C
Recommended Operating Conditions
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min.
4.5
0
2.4
–1.0
Typ.
5.0
0
—
—
Max.
5.5
0
6.5
0.8
(Ta = 0°C to 70°C)
Unit
V
V
V
V
Capacitance
Parameter
Input Capacitance (A0 - A9, D
IN
)
Input Capacitance (RAS,
CAS, WE)
Output Capacitance (D
OUT
)
Symbol
C
IN1
C
IN2
C
OUT
Typ.
—
—
—
(V
CC
= 5 V ±10%, Ta = 25°C, f = 1 MHz)
Max.
5
5
6
Unit
pF
pF
pF
4/15
¡ Semiconductor
DC Characteristics
MSM511000C/CL
(V
CC
= 5 V ±10%, Ta = 0°C to 70°C)
Symbol
Parameter
Output High Voltage
Output Low Voltage
Input Leakage Current
Condition
I
OH
= –5.0 mA
I
OL
= 4.2 mA
0 V
£
V
I
£
6.5 V;
All other pins not
under test = 0 V
D
OUT
disable
0 V
£
V
O
£
5.5 V
RAS, CAS
cycling,
t
RC
= Min.
RAS, CAS
= V
IH
MSM511000 MSM511000 MSM511000 MSM511000
C/CL-45
C/CL-50
C/CL-60
C/CL-70
Unit Note
Min. Max. Min. Max. Min. Max. Min. Max.
V
OH
V
OL
I
LI
2.4
0
–10
V
CC
0.4
10
2.4
0
–10
V
CC
0.4
10
2.4
0
–10
V
CC
0.4
10
2.4
0
–10
V
CC
0.4
10
V
V
mA
Output Leakage Current
Average Power
Supply Current
(Operating)
Power Supply
Current (Standby)
Average Power
Supply Current
(RAS-only Refresh)
Power Supply
Current (Standby)
Average Power
Supply Current
(CAS before
RAS
Refresh)
Average Power
Supply Current
(Fast Page Mode)
Average Power
Supply Current
(Battery Backup)
I
LO
–10
10
–10
10
–10
10
–10
10
mA
I
CC1
—
—
—
—
—
85
2
1
200
85
—
—
—
—
—
80
2
1
200
80
—
—
—
—
—
70
2
1
200
70
—
—
—
—
—
60
2
1
200
60
mA
1, 2
I
CC2
RAS, CAS
≥
V
CC
–0.2 V
RAS
cycling,
mA
mA
mA
1
1, 5
1, 2
I
CC3
CAS
= V
IH
,
t
RC
= Min.
RAS
= V
IH
,
I
CC5
CAS
= V
IL
,
D
OUT
= enable
—
5
—
5
—
5
—
5
mA
1
I
CC6
RAS
cycling,
CAS
before
RAS
RAS
= V
IL
,
—
85
—
80
—
70
—
60
mA
1, 2
I
CC7
CAS
cycling,
t
PC
= Min.
t
RC
= 125
ms,
—
80
—
75
—
65
—
55
mA
1, 3
I
CC10
CAS
before
RAS,
t
RAS
£
1
ms
—
300
—
300
—
300
—
300
mA
1, 4,
5
Notes : 1.
2.
3.
4.
5.
I
CC
Max. is specified as I
CC
for output open condition.
The address can be changed once or less while
RAS
= V
IL
.
The address can be changed once or less while
CAS
= V
IH
.
V
CC
– 0.2 V
£
V
IH
£
6.5 V, –1.0 V
£
V
IL
£
0.2 V.
L-version.
5/15
