FEDD5117405F-02
1
Semiconductor
MSM5117405F
DESCRIPTION
This version: Nov. 2000
Previous version : Aug. 2000
4,194,304-Word
×
4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
The MSM5117405F is a 4,194,304-word
×
4-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS
technology. The MSM5117405F achieves high integration, high-speed operation, and low-power
consumption because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal
CMOS process. The MSM5117405F is available in a 26/24-pin plastic SOJ or 26/24-pin plastic TSOP.
FEATURES
∙
4,194,304-word
×
4-bit configuration
∙
Single 5V power supply,
±10%
tolerance
∙
Input : TTL compatible, low input capacitance
∙
Output : TTL compatible, 3-state
∙
Refresh : 2048 cycles/32ms
∙
Fast page mode with EDO, read modify write capability
∙
CAS
before
RAS
refresh, hidden refresh,
RAS-only
refresh capability
∙
Packages
26/24-pin 300mil plastic SOJ
(
SOJ26/24-P-300-1.27
)
(Product : MSM5117405F-xxSJ)
26/24-pin 300mil plastic TSOP
(
TSOPII26/24-P-300-0.80-K
)
(Product : MSM5117405F-xxTS-K)
xx indicates speed rank.
PRODUCT FAMILY
Access Time (Max.)
Family
T
RAC
50ns
60ns
70ns
t
AA
25ns
30ns
35ns
t
CAC
13ns
15ns
20ns
t
OEA
13ns
15ns
20ns
Cycle Time
(Min.)
84ns
104ns
124ns
Power Dissipation
Operating
(Max.)
550mW
495mW
440mW
Standby
(Max.)
5.5mW
MSM5117405F
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FEDD5117405F-02
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Semiconductor
MSM5117405F
PIN CONFIGURATION (TOP VIEW)
V
CC
DQ1
DQ2
WE
RAS
NC
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
8
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
14
V
SS
DQ4
DQ3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
V
CC
DQ1
DQ2
WE
RAS
NC
1
2
3
4
5
6
26
25
24
23
22
21
19
18
17
16
15
14
V
SS
DQ4
DQ3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
A10 8
A0 9
A1 10
A2 11
A3 12
V
CC
13
26/24-Pin Plastic
SOJ
26/24-Pin Plastic TSOP
(K Type)
Pin Name
A0–A10
RAS
CAS
DQ1–DQ4
OE
WE
V
CC
V
SS
NC
Function
Address Input
Row Address Strobe
Column Address Strobe
Data Input/Data Output
Output Enable
Write Enable
Power Supply (5V)
Ground (0V)
No Connection
Note : The same power supply voltage must be provided to every V
CC
pin, and the same GND voltage level must
be provided to every V
SS
pin.
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FEDD5117405F-02
1
Semiconductor
MSM5117405F
BLOCK DIAGRAM
RAS
CAS
Timing
Generator
Timing
Generator
11
Column
Address
Buffers
Internal
Address
Counter
Row
Address
Buffers
11
Column Decoders
Write
Clock
Generator
WE
OE
4
Output
Buffers
4
4
4
Input
Buffers
4
A0
−
A10
Refresh
Control Clock
Sense Amplifiers
4
I/O
Selector
4
DQ1
−
DQ
4
11
11
Row
Deco-
ders
Word
Drivers
Memory
Cells
V
CC
On Chip
V
BB
Generator
V
SS
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FEDD5117405F-02
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Semiconductor
MSM5117405F
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage V
CC
Supply relative to V
SS
Short Circuit Output Current
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
T
I
OS
P
D*
T
opr
T
stg
Value
–0.5 to V
CC
+0.5
50
1
0 to 70
–55 to 150
Unit
V
mA
W
°C
°C
*: Ta = 25°C
RECOMMENDED OPERATING CONDITIONS
(Ta = 0 to 70°C)
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min.
4.5
0
2.4
−
0.5
*2
Typ.
5.0
0
Max.
5.5
0
V
CC
+ 0.5
*1
0.8
Unit
V
V
V
V
Notes: *1. The input voltage is V
CC
+ 1.0V when the pulse width is less than 20ns (the pulse width is with respect
to the point at which V
CC
is applied).
*2. The input voltage is V
SS
−
1.0V when the pulse width is less than 20ns (the pulse width respect to the
point at which V
SS
is applied).
PIN CAPACITANCE
(Vcc = 5V
±
10%, Ta = 25°C, f = 1 MHz)
Parameter
Input Capacitance (A0 – A10)
Input Capacitance
(RAS,
CAS, WE, OE)
Output Capacitance (DQ1 – DQ4)
Symbol
C
IN1
C
IN2
C
I/O
Min.
—
—
—
Max.
5
7
7
Unit
pF
pF
pF
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FEDD5117405F-02
1
Semiconductor
MSM5117405F
DC CHARACTERISTICS
(V
CC
= 5V
±
10%, Ta = 0 to 70°C)
MSM5117405
F-50
Min.
Output High Voltage
Output Low Voltage
Input Leakage
Current
Output Leakage
Current
Average Power
Supply Current
(Operating)
Power Supply
Current
(Standby)
Average Power
Supply Current
(RAS-only Refresh)
Power Supply
Current
(Standby)
Average Power
Supply Current
(CAS before
RAS
Refresh)
Average Power
Supply Current
(Fast Page Mode)
V
OH
V
OL
I
OH
=
−5.0mA
I
OL
= 4.2mA
0V
≤
V
I
≤
6.5V;
I
LI
All other pins not
under test = 0V
DQ disable
0V
≤
V
O
≤
V
CC
RAS, CAS
cycling,
t
RC
= Min.
RAS, CAS
= V
IH
I
CC2
RAS, CAS
≥
V
CC
−
0.2V
RAS
cycling,
I
CC3
CAS
= V
IH
,
t
RC
= Min.
RAS
= V
IH
,
I
CC5
CAS
= V
IL
,
DQ = enable
RAS
= cycling,
CAS
before
RAS
RAS
= V
IL
,
I
CC7
CAS
cycling,
t
HPC
= Min.
100
90
80
mA
1,3
5
5
5
mA
1
100
90
80
mA
1,2
−
10
10
−
10
10
−
10
10
µA
2.4
0
Max.
V
CC
0.4
MSM5117405
F-60
Min.
2.4
0
Max.
V
CC
0.4
MSM5117405
F-70
Unit Note
Min.
2.4
0
Max.
V
CC
0.4
V
V
Parameter
Symbol
Condition
I
LO
−
10
10
−
10
10
−
10
10
µA
I
CC1
100
90
80
mA
1,2
2
1
2
1
2
mA
1
1
I
CC6
100
90
80
mA
1,2
Notes: 1. I
CC
Max. is specified as I
CC
for output open condition.
2. The address can be changed once or less while
RAS
= V
IL
.
3. The address can be changed once or less while
CAS
= V
IH
.
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模拟电子