Dear customers,
About the change in the name such as "Oki Electric Industry Co. Ltd." and
"OKI" in documents to OKI Semiconductor Co., Ltd.
The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI
Semiconductor Co., Ltd. on October 1, 2008.
Therefore, please accept that although
the terms and marks of "Oki Electric Industry Co., Ltd.", “Oki Electric”, and "OKI"
remain in the documents, they all have been changed to "OKI Semiconductor Co., Ltd.".
It is a change of the company name, the company trademark, and the logo, etc. , and
NOT a content change in documents.
October 1, 2008
OKI Semiconductor Co., Ltd.
550-1 Higashiasakawa-cho, Hachioji-shi, Tokyo 193-8550, Japan
http://www.okisemi.com/en/
FEDS51V4222C-03
1
Semiconductor
MSM51V4222C
262,263-Word
×
4-Bit Field Memory
This version: Oct. 2000
Previous version: Feb. 2000
GENERAL DESCRIPTION
The OKI MSM51V4222C is a high performance 1-Mbit, 256 K
×
4-bit, Field Memory. It is designed for high-
speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital movies and Multi-media
systems. It is a FRAM for wide or low end use as general commodity TVs and VTRs, exclusively. The
MSM51V4222C is not designed for the other use or high end use in medical systems, professional graphics
systems which require long term picture, and data storage systems and others. The 1-Mbit capacity fits one field of
a conventional NTSC TV screen and cascaded directly without any delay devices among the MSM51V4222C.
(Cascading of MSM51V4222C provides larger storage depth or a longer delay).
Each of the 4-bit planes has separate serial write and read ports. These employ independent control clocks to
support asynchronous read and write operations. Different clock rates are also supported that allow alternate data
rates between write and read data streams.
The MSM51V4222C provides high speed FIFO, First-In First-Out, operation without external refreshing: it
refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable refresh free serial access operation,
so that the serial read and/or write control clock can be halted high or low for any duration as long as the power is
on. Internal conflicts of memory access and refreshing operations are prevented by special arbitration logic.
The MSM51V4222C’s function is simple, and similar to a digital delay device whose delay-bit-length is easily set
by reset timing. The delay length, number of read delay clocks between write and read, is determined by externally
controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256
×
4-bit enable high speed first-bit-
access with no clock delay just after the write or read reset timings.
The MSM51V4222C is similar in operation and functionality to OKI 2-Mbit Field Memory MSM51V8222A.
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FEDS51V4222C-03
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1
MSM51V4222C
FEATURES
•
•
•
•
Single power supply: 3.3 V
±
0.3 V
512 Rows
×
512 Column
×
4 bits
Fast FIFO (First-in First-out) operation
High speed asynchronous serial access
Read/Write cycle time
30 ns/40 ns
Access time
30 ns/35 ns
•
Functional compatibility with OKI MSM51V8222A
•
Self refresh (No refresh control is required)
•
Package options:
16-pin 300 mil plastic DIP
(DIP16-P-300-2.54)
26/20-pin 300 mil plastic SOJ
(SOJ26/20-P-300-1.27)
20-pin 400 mil plastic ZIP
(ZIP20-P-400-1.27)
(Product: MSM51V4222C-xxRA)
(Product: MSM51V4222C-xxJA)
(Product: MSM51V4222C-xxRD)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM51V4222C-30RA
MSM51V4222C-40RA
MSM51V4222C-30JA
MSM51V4222C-40JA
MSM51V4222C-30RD
MSM51V4222C-40RD
Access Time (Max.)
30 ns
35 ns
30 ns
35 ns
30 ns
35 ns
Cycle Time (Min.)
30 ns
40 ns
30 ns
40 ns
30 ns
40 ns
Package
300 mil 16-pin DIP
300 mil 26/20-pin SOJ
400 mil 20-pin ZIP
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FEDS51V4222C-03
Semiconductor
1
MSM51V4222C
PIN CONFIGURATION (TOP VIEW)
WE 1
RSTW 2
SWCK 3
D
IN
0 4
D
IN
1 5
D
IN
2 6
D
IN
3 7
V
SS
8
16 V
CC
15 RE
14 RSTR
13 SRCK
12 D
OUT
0
11 D
OUT
1
10 D
OUT
2
9 D
OUT
3
WE 1
RSTW 2
SWCK 3
D
IN
0 4
NC 5
NC 9
D
IN
1 10
D
IN
2 11
D
IN
3 12
V
SS
13
26 V
CC
25 RE
24 RSTR
23 SRCK
22 NC
18 NC
17 D
OUT
0
16 D
OUT
1
15 D
OUT
2
14 D
OUT
3
SRCK
RE
1
3
2 RSTR
4 V
CC
6 RSTW
8 D
IN
0
NO LEAD
12 NC
14 D
IN
2
16 V
SS
18 D
OUT
2
20 D
OUT
0
WE 5
SWCK 7
NC
9
NC 11
D
IN
1 13
D
IN
3 15
D
OUT
3 17
D
OUT
1 19
26/20-Pin Plastic SOJ
16-Pin Plastic DIP
20-Pin Plastic ZIP
Pin Name
SWCK
SRCK
WE
RE
RSTW
RSTR
D
IN
0 to 3
D
OUT
0 to 3
V
CC
V
SS
NC
Function
Serial Write Clock
Serial Read Clock
Write Enable
Read Enable
Write Reset Clock
Read Reset Clock
Data Input
Data Output
Power Supply (3.3 V)
Ground (0 V)
No Connection
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FEDS51V4222C-03
Semiconductor
1
MSM51V4222C
BLOCK DIAGRAM
D
OUT
(× 4)
Data-Out
Buffer (× 4)
RE
RSTR
SRCK
Serial Read Controller
512-Word Serial Read Register (× 4)
Read Line Buffer Read Line Buffer
Low-Half (
×
4)
High-Half (
×
4)
256 (× 4)
120-Word
Sub-Register (× 4)
256 (× 4)
120-Word
Sub-Register (× 4)
256K (× 4)
Memory
Array
X
Decoder
Read/Write
and Refresh
Controller
256 (× 4)
256 (× 4)
Clock
Oscillator
Write Line Buffer Write Line Buffer
Low-Half (
×
4)
High-Half (
×
4)
512-Word Serial Write Register (× 4)
Data-In
Buffer (× 4)
V
BB
Generator
Serial Write Controller
D
IN
(× 4)
WE
RSTW
SWCK
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