Semiconductor
MSM538052E
524,288-Words x 16-bit or 1,048,576-Bytes x 8-bit MaskROM
8Words x 16-Bit or 16Bytes x 8-Bit/Page Mode MASKROM
DESCRIPTION
The OKI MSM538052E is a 524,288-words x 16-bit or 1,048,576-Bytes x 8-bit CMOS Mask
ROM with an asynchronous page read mode. Each page is organized 8 words x 16-bit or 16
words x 8-bit. It operates on a single 5.0V power supply and is TTL compatible. The chip's
asynchronous I/O requires no external clock assuring easy operation. A power-down mode
provides low power dissipation when the chip is not selected. The CE and OE pins are
provided as control signals that permit three-stated output allowing easy memory expansion
on a system bus.The MSM538052E is suited for use as large capacity fixed memory for
microcomputers and data terminals.
FEATURES
Single 5.0V power supply
524,288-words x 16-bit / 1,048,576-Bytes x 8-bit
8-words(A2,A1,A0) or 16-Bytes(A2,A1,A0,A-1) / Page
Access time
100ns Max (Normal access)
50ns Max (Page access)
Input/Output TTL compatible
Tri-State output configurations
Internal powerdown function
Packages:
42-PIN PLASTIC DIP
(MSM538052E-xxRS)
(DIP42-P-600-2.54)
44-PIN PLASTIC SOP
(MSM538052E-xxGS-K)
(SOP44-P-600-1.27-K)
44-PIN PLASTIC TSOP (TSOP44-P-400-0.80-1K) (MSM538052E-xxTS-AK)
Pin compatible OTP available
1998.10
1
MSM538052E
PIN CONFIGURATION
NC 1
A18 1
A17 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
CE 11
V
SS
12
OE 13
D0 14
D8 15
D1 16
D9 17
D2 18
D10 19
D3 20
D11 21
42PIN DIP
42 NC
41 A8
40 A9
39 A10
38 A11
37 A12
36 A13
35 A14
34 A15
33 A16
32 BYTE
31 V
SS
30 D15/A-1
29 D7
28 D14
27 D6
26 D13
25 D5
24 D12
23 D4
22 V
CC
A18 2
A17 3
A7 4
A6 5
A5 6
A4 7
A3 8
A2 9
A1 10
A0 11
CE 12
V
SS
13
OE 14
D0 15
D8 16
D1 17
D9 18
D2 19
D10 20
D3 21
D11 22
44PIN SOP/
TSOP
44 NC
43 NC
42 A8
41 A9
40 A10
39 A11
38 A12
37 A13
36 A14
35 A15
34 A16
33 BYTE
32 V
SS
31 D15/A-1
30 D7
29 D14
28 D6
27 D13
26 D5
25 D12
24 D4
23 V
CC
Pin Name
D15/A-1
A0 to A18
D0 to D15
CE
OE
BYTE
V
CC
, V
SS
Function
Data output / address input
Address input
Data output
Chip enable
Output enable
Mode switch
Power supply
2
MSM538052E
BLOCK DIAGRAM
V
CC
V
SS
A-1
BYTE
Output Switching Between 8 and 16 bits
CE
OE
CE
OE
Control
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
X
Decoder
Memory Cell
Matrix
524,288 x 16 or 1,048,676 x 8
Address
Buffer
Multiplexer & Page Data Latch
Y
Decoder
Output Buffer
D0
D1
D2
D3
D4
D5
D6
D7
D8
D10 D12 D14
D9 D11 D13 D15
FUNCTION TABLE
CE
H
L
L
L
L
L
L
L
OE
X
H
L
L
L
L
L
L
BYTE
X
X
H
H
L
L
L
L
A-1/D15
X
X
Input Inhibited (D15)
Input Inhibited (D15)
D0—D7
Hi-Z
Hi-Z
D0 to D7
D0 to D7
D0 to D7
D8 to D15
D0 to D7
D8 to D15
D8—D15
Hi-Z
Hi-Z
D8 to D15
D8 to D15
Hi-Z
Hi-Z
Hi-Z
Hi-Z
DOUT Mode
Hi-Z
16 bit
16 bit(Page Mode)
8 bit
8 bit(Page Mode)
LSB
—
A0
A0
A-1
A-1
MSB
—
A18
A2
A18
A2
L
H
L
H
3
MSM538052E
ABSOLUTE MAXIMUM LIMITS
Parameter
Power Supply Voltage
Input Voltage
Output Voltage
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
CC
V
I
V
O
P
D
T
opr
T
stg
Per Package T
opr
= 25°C
—
—
Conditions
to V
SS
Limits
–0.3 to 7
–0.3 to V
CC
+ 0.5
–0.3 to V
CC
+ 0.5
1.0
0 to 70
–55 to 150
Unit
V
V
V
W
°C
°C
RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage
"H" Input Voltage
"L" Input Voltage
Operating Temperature
Symbol
V
CC
V
SS
V
IH
V
IL
T
opr
Conditions
—
—
—
—
—
Limits
Min.
4.5
0.0
2.2
–0.3
0
Typ.
5.0
0.0
5.0
0.0
—
Max.
5.5
0.0
5.5
0.8
70
Unit
V
V
V
V
°C
DC CHARACTERISTICS
(V
CC
= 5V±10%, Ta = 0 to 70°C)
Parameter
"H" Output Voltage
"L" Output Voltage
Input Leakage Current
Output Leakage Current
Power Supply Current
(Operating)
Power Supply Current
(Standby)
Symbol
V
OH
V
OL
I
LI
I
LO
I
CC
I
CCS1
I
CCS
Conditions
I
OH
= –400µA
I
OH
= 2.1mA
V
I
= 0 to V
CC
V
O
= 0 to V
CC
CE = V
IH MIN
CE = V
IL,
OE = V
IH,
t
C
= 100ns
CE = V
CC
–0.2V
CE = V
IH MIN
Limits
Min.
2.4
—
–10
–10
—
—
—
Typ.
—
—
—
—
—
—
—
Max.
—
0.4
10
10
80
50
500
Unit
V
V
µA
µA
mA
µA
µA
4
MSM538052E
AC CHARACTERISTICS
Test conditions
Parameter
Input Signal Level
Transtion Time
Timing Reference Level
Load Condition
Conditions
V
IH
=3.0V, V
IL
=0.0V
tr=tf=5ns
Input Voltage=1.5V
Output Voltage=0.8V&2.0V
CL=100pF+1TTL
Read Cycle
(Ta = 0 to 70°C)
Parameter
Random Access Cycle time
Random Address Access time
Page Set up time
Page Access Cycle time
Page Access time
CE Access time
OE Access time
CE Output Disable time
OE Output Disable time
Output Hold time
Symbol
t
C
t
ACC
t
PSET
t
PC
t
PAC
t
CE
t
OE
t
CHZ
t
OHZ
t
OH
Conditions
—
—
—
—
—
—
—
—
—
—
Limits
Min.
100
—
120
50
—
—
—
0
0
0
Typ.
—
—
—
—
—
—
—
—
—
—
Max.
—
100
—
—
50
100
50
40
30
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle (Note1)
t
C
Address
t
ACC
OE
t
OE
D
OUT
t
OH
5
嵌入式系统