Dear customers,
About the change in the name such as "Oki Electric Industry Co. Ltd." and
"OKI" in documents to OKI Semiconductor Co., Ltd.
The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI
Semiconductor Co., Ltd. on October 1, 2008.
Therefore, please accept that although
the terms and marks of "Oki Electric Industry Co., Ltd.", “Oki Electric”, and "OKI"
remain in the documents, they all have been changed to "OKI Semiconductor Co., Ltd.".
It is a change of the company name, the company trademark, and the logo, etc. , and
NOT a content change in documents.
October 1, 2008
OKI Semiconductor Co., Ltd.
550-1 Higashiasakawa-cho, Hachioji-shi, Tokyo 193-8550, Japan
http://www.okisemi.com/en/
OKI Semiconductor
MSM5412222B
262,214-Word
×
12-Bit Field Memory
FEDS5412222B-01
Issue Date: Nov.,20, 2002
GENERAL DESCRIPTION
The OKI MSM5412222B is a high performance 3-Mbit, 256K
×
12-bit, Field Memory. It is especially designed
for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital movies and
Multi-media systems. MSM5412222B is a FRAM for wide or low end use in general commodity TVs and VTRs
exclusively. MSM5412222B is not designed for the other use or high end use in medical systems, professional
graphics systems which require long term picture storage, data storage systems and others. More than two
MSM5412222Bs can be cascaded directly without any delay devices among the MSM5412222Bs. (Cascading of
MSM5412222B provides larger storage depth or a longer delay).
Each of the 12-bit planes has separate serial write and read ports. These employ independent control clocks to
support asynchronous read and write operations. Different clock rates are also supported that allow alternate data
rates between write and read data streams.
The MSM5412222B provides high speed FIFO, First-In First-Out, operation without external refreshing:
MSM5412222B refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial access
operation, so that serial read and/or write control clock can be halted high or low for any duration as long as the
power is on. Internal conflicts of memory access and refreshing operations are prevented by special arbitration
logic.
The MSM5412222B’s function is simple, and similar to a digital delay device whose delay-bit-length is easily set
by reset timing. The delay length, number of read delay clocks between write and read, is determined by externally
controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256
×
12-bit enable high speed
first-bit-access with no clock delay just after the write or read reset timings.
Additionally, the MSM5412222B has write mask function or input enable function (IE), and read-data skipping
function or output enable function (OE) . The differences between write enable (WE) and input enable (IE), and
between read enable (RE) and output enable (OE) are that WE and RE can stop serial write/read address
increments, but IE and OE cannot stop the increment, when write/read clocking is continuously applied to
MSM5412222B. The input enable (IE) function allows the user to write into selected locations of the memory
only, leaving the rest of the memory contents unchanged. This facilitates data processing to display a “picture in
picture” on a TV screen.
The MSM5412222B is similar in operation and functionality to OKI 1-Mbit Field Memory MSM514222C and
2-Mbit Field Memory MSM518222A. Three MSM514222Cs or one MSM514222C plus one MSM518222A can
be replaced simply by one MSM5412222B.
1/17
FEDS5412222B-01
OKI Semiconductor
MSM5412222B
FEATURES
•
•
•
•
•
•
•
•
•
Single power supply: 5.0 V ±0.5 V
262,214 words
×
12 bits
Fast FIFO (First-In First-Out) operation
High speed asynchronous serial access
Read/write cycle time 25 ns/30 ns
Access time
23 ns/25 ns
Direct cascading capability
Write mask function (Input enable control)
Data skipping function (Output enable control)
Self refresh (No refresh control is required)
Package options:
44-pin 400 mil plastic TSOP (Type 2)
(TSOP(2)44-P-400-0.80-K) (Product:MSM5412222B-xxTS-K)
40-pin 400 mil plastic SOJ
(SOJ40-P-400-1.27)
(Product: MSM5412222B-xxJS)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM5412222B-25TS-K
MSM5412222B-30TS-K
MSM5412222B-25JS
MSM5412222B-30JS
Access Time (Max.)
23 ns
25 ns
23 ns
25 ns
Cycle Time (Min.)
25 ns
30 ns
25 ns
30 ns
Package
400 mil 44-pin TSOP (2)
400 mil 40-pin SOJ
2/17
FEDS5412222B-01
OKI Semiconductor
MSM5412222B
PIN CONFIGURATION (TOP VIEW)
V
SS
D
IN
11
D
IN
10
NC
D
IN
9
D
IN
8
D
IN
7
D
IN
6
NC
D
IN
5
D
IN
4
D
IN
3
D
IN
2
NC
D
IN
1
D
IN
0
SWCK
RSTW
NC
WE
IE
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
V
SS
D
OUT
11
D
OUT
10
NC
D
OUT
9
D
OUT
8
D
OUT
7
D
OUT
6
V
CC
D
OUT
5
D
OUT
4
D
OUT
3
D
OUT
2
V
SS
D
OUT
1
D
OUT
0
SRCK
RSTR
NC
RE
OE
V
CC
V
SS
1
NC
2
D
IN
11
3
D
IN
10
4
D
IN
9
5
D
IN
8
6
D
IN
7
7
D
IN
6
8
D
IN
5
9
D
IN
4
10
D
IN
3
11
D
IN
2
12
D
IN
1
13
D
IN
0
14
SWCK
15
RSTW
16
WE
17
IE
18
NC
19
V
CC
20
40
V
SS
39
V
CC
38
D
OUT
11
37
D
OUT
10
36
D
OUT
9
35
D
OUT
8
34
D
OUT
7
33
D
OUT
6
32
D
OUT
5
31
D
OUT
4
30
D
OUT
3
29
D
OUT
2
28
D
OUT
1
27
D
OUT
0
26
SRCK
25
RSTR
24
RE
23
OE
22
V
SS
21
V
CC
44-Pin Plastic TSOP (2)
(K Type)
40-Pin Plastic SOJ
Pin Name
SWCK
SRCK
WE
RE
IE
OE
RSTW
RSTR
D
IN
0 to 11
D
OUT
0 to 11
V
CC
V
SS
NC
Function
Serial Write Clock
Serial Read Clock
Write Enable
Read Enable
Input Enable
Output Enable
Write Reset Clock
Read Reset Clock
Data Input
Data Output
Power Supply (5.0 V)
Ground (0 V)
No Connection
Note: The same power supply voltage must be provided to every V
CC
pin, and the same GND voltage
level must be provided to every V
SS
pin.
3/17
D
OUT
(
×
12)
OE
RE
RSTR
SRCK
OKI Semiconductor
BLOCK DIAGRAM
Data-Out
Buffer (
×
12)
Serial Read Controller
Serial Read Register (
×
12)
Read Line Buffer
(
×
12)
71-Word
Sub-Register (
×
12)
262,144
×
12
Memory
Array
71-Word
Sub-Register (
×
12)
(
×
12)
Write Line Buffer
Serial Write Register (
×
12)
V
BB
Generator
Serial Write Controller
Clock
Oscillator
X
Decoder
Read/Write
and Refresh
Controller
Data-In
Buffer (
×
12)
FEDS5412222B-01
MSM5412222B
D
IN
(
×
12)
IE
WE
RSTW SWCK
4/17
