MT352
COFDM Demodulator
Data Sheet
Features
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•
•
•
•
•
•
•
•
•
•
•
•
•
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Nordig II and ETSI 300 744 compliant
Superior Single Frequency Network performance
Unique active Impulse-Noise filtering
Single SAW operation
Automatic co-channel and adjacent-channel
interference suppression
Clock generation from single low-cost 20.48 MHz
crystal or external 4 or 27 MHz clock
IF sampling at 4.57, 36.17 or 43.5 MHz from a
single crystal frequency
Channel bandwidth of 6, 7 & 8 MHz
Blind acquisition capability (including 2 K / 8 K
mode detect)
Automatic spectral inversion detection
Fast auto-scan and acquisition technology
Very low software overhead
Dual AGC control option
Access to channel SNR, pre- and post-Viterbi bit
error rates
Compact 64 pin LQFP
Less than 0.22 W power consumption
Standby and sleep options
February 2005
Ordering Information
MT352/CG/GP1N
64 Pin LQFP Trays
MT352/CG/GP1Q 64 Pin LQFP Tape & Reel
MT352/CG/GP2Q
64 Pin LQFP* Tape & Reel
MT352/CG/GP2N
64 Pin LQFP* Trays
* Pb Free Matte Tin
0
o
C to +70
o
C
Zarlink evaluation kits include application board, TNIM
and supporting software based on industry standard
operating systems. Device drivers are also available
enabling rapid product development and reduction in
time to market.
Description
MT352 is a superior third generation Coded
Orthogonal Frequency Division Multiplex (COFDM)
television demodulator that is both Nordig II and DVB
(as defined in ETS 300 744 specification) compliant. It
can be used in either 2 K or 8 K modes with 6, 7 or
8 MHz channels and is capable of addressing all
modes of transmission.
The device includes a high performance 10-bit A/D
converter capable of accepting direct IF at 36.17 or
43.75 MHz. Sampling rates required for both these
frequencies in 6,7 or 8 MHz OFDM channels can be
generated from a single 20.48 MHz crystal.
Alternatively, there is provision to replace this crystal
with a 4 or 27 MHz external clock input.
Applications
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Set-top boxes
Integrated digital televisions
Personal video recorders
Terrestrial PC reception
Mobile and portable applications
RF in
ADC
IF to
Baseband
conversion &
Interpolator
FFT
Pilot &
Channel
Processor
Symbol & Bit
De-interleaver
& Demapper
FEC
MPEG
TS
AGC
Impulse
Suppression
Secondary
2-wire bus
Symbol,
Carrier &
Timing
Recovery
Tuner control
Control
engine
Primary
2-wire bus
Figure 1 - Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.
MT352
Data Sheet
Unique algorithms that actively filter out impulse noise, without affecting normal performance, have been
implemented. This reduces the interference effect from vehicles and electrical appliances, which is known to have
significant detrimental effect on the quality of digital TV reception.
Programming is simplified utilizing a high level command driven interface. A sophisticated engine controls all
acquisition and tracking operations as well as controlling the tuner via a 2-wire bus. Any frequency range can be
automatically scanned for digital TV channels. This mechanism ensures minimal interaction, maximum flexibility,
fastest acquisition and the fastest auto scan capability of any chip in the market.
Blind acquisition mode enables automatic detection of all OFDM signal parameters, including mode, guard and
spectral inversion. The frequency capture range is sufficient to compensate for the combined offset introduced by
the tuner and broadcaster.
The device is packaged in a 64 pin LQFP and consumes less than 220 mW of power.
MT352 CG
YYWW*W
•
Pin 1 Corner
∆
Figure 2 - Package Outline
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Zarlink Semiconductor Inc.
MT352
Pin Description
Pin Description Table
Pin No
MPEG pins
47
48
49-53, 56-58
61
62
63
11
6
Control pins
4
5
23
24
10
12, 15-18
44
35
36
42
41
43
9
27
26
Analog inputs
30
31
Supply pins
VIN
VIN
positive input
negative input
I
I
CLK1
DATA1
XTI
XTO
SLEEP
SADD(4:0)
SMTEST
CLK2/GPP0
DATA2/GPP1
AGC1
AGC2/GPP2
GPP(3)
RESET
OSCMODE
PLLTEST
Device power down
Serial address set
Scan mode enable
Serial clock tuner
Serial data tuner
Primary AGC
Secondary AGC
General purpose I/O
Device reset
Crystal oscillator mode
PLL analogue test
Serial clock
Serial data
Low phase noise
oscillator
I
I/O
I
O
I
I
I
I/O
I/O
O
I/O
I/O
I
I
O
CMOS
CMOS
Open drain
CMOS
CMOS
Open drain
5
5
MOSTRT
MOVAL
MDO(0:7)
MOCLK
BKERR
MICLK
STATUS
IRQ
MPEG packet start
MPEG data valid
MPEG data bus
MPEG clock out
Block error
MPEG clock in
Status output
Interrupt output
O
O
O
O
O
I
O
O
Open drain
CMOS
CMOS Tristate
Name
Description
I/O
Type
Data Sheet
V
mA
3·3
3·3
3·3
3·3
3·3
3·3
3·3
5
1
1
1
1
1
1
6
6
3·3
3·3
3·3
5
5
5
5
5
5
3·3
6
6
6
6
6
3
Zarlink Semiconductor Inc.
MT352
Pin Description Table (continued)
Pin No
21
22
7, 19, 37, 39, 59, 64
2, 13, 45, 54,
1, 3, 8, 14, 20, 25, 38,
40, 46, 55, 60
28
29, 32
33
34
Name
PLLVDD
PLLGND
CVDD
VDD
GND
AVDD
AGND
DVDD
DGND
ADC digital supply
Core logic power
I/O ring power
Core and I/O ground
ADC analog supply
Description
PLL supply
I/O
S
S
S
S
S
S
S
S
S
Type
V
1·8
0
1·8
3·3
0
1·8
0
1·8
0
Data Sheet
mA
4
Zarlink Semiconductor Inc.
MT352
Table of Contents
Data Sheet
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.0 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.1 Analogue-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.2 Automatic Gain Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3 IF to Baseband Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.4 Adjacent Channel Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.5 Interpolation and Clock Synchronisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.6 Carrier Frequency Synchronisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.7 Symbol Timing Synchronisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.8 Fast Fourier Transform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.9 Common Phase Error Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.10 Channel Equalisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.11 Impulse Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.12 Transmission Parameter Signalling (TPS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.13 De-Mapper. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.14 Symbol and Bit De-Interleaving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.15 Viterbi Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.16 MPEG Frame Aligner . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.17 De-interleaver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.18 Reed-Solomon Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.19 De-scrambler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.20 MPEG Transport Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.0 Software control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.0 Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1 2-Wire Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Host . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2.1 Tuner . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2.2 Examples of 2-Wire Bus Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2.3 Primary 2-Wire Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3 MPEG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3.1 Data Output Header Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3.2 MPEG data output signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3.3 MPEG Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3.3.1 MOCLKINV = 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.3.2 MOCLKINV = 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.0 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.3 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.4 Crystal Specification and External Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.0 Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
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Zarlink Semiconductor Inc.
