Fixed burst length (BL) of 8 and burst chop (BC) of 4
(via the mode register set [MRS])
Selectable BC4 or BL8 on-the-fly (OTF)
Self refresh mode
T
C
of 0°C to 95°C
– 64ms, 8192 cycle refresh at 0°C to 85°C
– 32ms, 8192 cycle refresh at 85°C to 95°C
Self refresh temperature (SRT)
Write leveling
Multipurpose register
Output driver calibration
Options
1
• Configuration
– 1 Gig x 4
– 512 Meg x 8
– 256 Meg x 16
• FBGA package (Pb-free) – x4, x8
– 78-ball (10.5mm x 12mm) Rev. D
– 78-ball (9mm x 10.5mm) Rev. E, J
• FBGA package (Pb-free) – x16
– 96-ball (10mm x 14mm) Rev. D
– 96-ball (9mm x 14mm) Rev. E
• Timing – cycle time
– 938ps @ CL = 14 (DDR3-2133)
– 1.071ns @ CL = 13 (DDR3-1866)
– 1.25ns @ CL = 11 (DDR3-1600)
– 1.5ns @ CL = 9 (DDR3-1333)
– 1.87ns @ CL = 7 (DDR3-1066)
• Operating temperature
– Commercial (0°C
≤
T
C
≤
+95°C)
– Industrial (–40°C
≤
T
C
≤
+95°C)
• Revision
Note:
Marking
1G4
512M8
256M16
RA
RH
RE
HA
-093
-107
-125
-15E
-187E
None
IT
:D/:E/:J
•
•
•
•
1. Not all options listed can be combined to
define an offered product. Use the part
catalog search on
http://www.micron.com
for available offerings.
Table 1: Key Timing Parameters
Speed Grade
-093
1, 2, 3, 4
-107
1, 2, 3
-125
1, 2,
-15E
1,
-187E
Notes:
1.
2.
3.
4.
Data Rate (MT/s)
2133
1866
1600
1333
1066
Target
t
RCD-
t
RP-CL
14-14-14
13-13-13
11-11-11
9-9-9
7-7-7
t
RCD
(ns)
t
RP
(ns)
CL (ns)
13.09
13.91
13.75
13.5
13.1
13.09
13.91
13.75
13.5
13.1
13.09
13.91
13.75
13.5
13.1
Backward compatible to 1066, CL = 7 (-187E).
Backward compatible to 1333, CL = 9 (-15E).
Backward compatible to 1600, CL = 11 (-125).
Backward compatible to 1866, CL = 13 (-107).
PDF: 09005aef8417277b
4Gb_DDR3_SDRAM.pdf - Rev. M 4/13 EN
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
4Gb: x4, x8, x16 DDR3 SDRAM
Features
Table 2: Addressing
Parameter
Configuration
Refresh count
Row addressing
Bank addressing
Column addressing
Page size
1 Gig x 4
128 Meg x 4 x 8 banks
8K
64K (A[15:0])
8 (BA[2:0])
2K (A[11, 9:0])
1KB
512 Meg x 8
64 Meg x 8 x 8 banks
8K
64K (A[15:0])
8 (BA[2:0])
1K (A[9:0])
1KB
256 Meg x 16
32 Meg x 16 x 8 banks
8K
32K (A[14:0])
8 (BA[2:0])
1K (A[9:0])
2KB
Figure 1: DDR3 Part Numbers
Example Part Number:
MT41J512M8RH-125:E
-
MT41J
Configuration
Package
Speed
:
Revision
:D/:E/:J Revision
Temperatu re
1G4
512M8
256M16
Speed Grade
Package
78-ball 10.5mm x 12mm FBGA
78-ball 9mm x 10.5mm FBGA
96-ball 10.0mm x 14mm FBGA
96-ball 9mm x 14mm FBGA
Rev.
D
E, J
D
E
Mark
RA
RH
RE
HA
-093
-107
-125
-15E
-187E
t
CK
t
CK
t
CK
t
CK
t
CK
Configuration
1 Gig x 4
512 Meg x 8
256 Meg x 16
Commercial
Industrial temperature
None
IT
= 0.938ns, CL = 14
= 1.071ns, CL = 13
= 1.25ns, CL = 11
= 1.5ns, CL = 9
= 1.87ns, CL = E
Note:
1. Not all options listed can be combined to define an offered product. Use the part catalog search on
http://www.micron.com
for available offerings.
FBGA Part Marking Decoder
Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the
part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Micron’s Web site:
http://www.micron.com.
PDF: 09005aef8417277b
4Gb_DDR3_SDRAM.pdf - Rev. M 4/13 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
4Gb: x4, x8, x16 DDR3 SDRAM
Features
Contents
State Diagram ................................................................................................................................................ 11
Industrial Temperature ............................................................................................................................... 12
General Notes ............................................................................................................................................ 12
Electrical Specifications – DC and AC .............................................................................................................. 46
DC Operating Conditions ........................................................................................................................... 46
Slew Rate Definitions for Single-Ended Output Signals ................................................................................. 71
Slew Rate Definitions for Differential Output Signals .................................................................................... 72
Speed Bin Tables ............................................................................................................................................ 73
Electrical Characteristics and AC Operating Conditions ................................................................................... 78
Command and Address Setup, Hold, and Derating ........................................................................................... 98
Data Setup, Hold, and Derating ...................................................................................................................... 106
Commands – Truth Tables ............................................................................................................................. 115
NO OPERATION ........................................................................................................................................ 118
ZQ CALIBRATION LONG ........................................................................................................................... 118
ZQ CALIBRATION SHORT .......................................................................................................................... 118
Burst Type ................................................................................................................................................. 137
CAS Latency (CL) ....................................................................................................................................... 139
CAS Write Latency (CWL) ........................................................................................................................... 144
AUTO SELF REFRESH (ASR) ....................................................................................................................... 144
SELF REFRESH TEMPERATURE (SRT) ........................................................................................................ 145
SRT vs. ASR ............................................................................................................................................... 145
Extended Temperature Usage ........................................................................................................................ 181
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
4Gb: x4, x8, x16 DDR3 SDRAM
Features
ODT Off During READs .............................................................................................................................. 203
