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MT46HC16M32LGCX-6IT:B

DDR DRAM, 16MX32, 6ns, CMOS, PBGA90, 9 X 13 MM, GREEN, PLASTIC, VFBGA-90

器件类别:存储    存储   

厂商名称:Micron Technology

厂商官网:http://www.mdtic.com.tw/

器件标准:  

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Micron Technology
零件包装代码
BGA
包装说明
VFBGA,
针数
90
Reach Compliance Code
compliant
ECCN代码
EAR99
访问模式
FOUR BANK PAGE BURST
最长访问时间
6 ns
其他特性
AUTO/SELF REFRESH
JESD-30 代码
R-PBGA-B90
JESD-609代码
e1
长度
13 mm
内存密度
536870912 bit
内存集成电路类型
DDR DRAM
内存宽度
32
功能数量
1
端口数量
1
端子数量
90
字数
16777216 words
字数代码
16000000
工作模式
SYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-40 °C
组织
16MX32
封装主体材料
PLASTIC/EPOXY
封装代码
VFBGA
封装形状
RECTANGULAR
封装形式
GRID ARRAY, VERY THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度)
260
认证状态
Not Qualified
座面最大高度
1 mm
自我刷新
YES
最大供电电压 (Vsup)
1.95 V
最小供电电压 (Vsup)
1.7 V
标称供电电压 (Vsup)
1.8 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Tin/Silver/Copper (Sn/Ag/Cu)
端子形式
BALL
端子节距
0.8 mm
端子位置
BOTTOM
处于峰值回流温度下的最长时间
30
宽度
9 mm
文档预览
512Mb: x16, x32 Mobile LPDDR SDRAM
Features
Mobile Low-Power DDR SDRAM
MT46H32M16LF – 8 Meg x 16 x 4 Banks
MT46H16M32LF – 4 Meg x 32 x 4 Banks
Features
V
DD
/V
DDQ
= 1.70–1.95V
1.2V I/O option V
DDQ
= 1.14–1.30V
Bidirectional data strobe per byte of data (DQS)
Internal, pipelined double data rate (DDR)architec-
ture; two data accesses per clock cycle
Differential clock inputs (CK and CK#)
Commands entered on each positive CK edge
DQS edge-aligned with data for READs;center-
aligned with data for WRITEs
4 internal banks for concurrent operation
Data masks (DM) for masking write data—one mask
per byte
Programmable burst lengths (BL): 2, 4, 8, or 16
Concurrent auto precharge option is supported
Auto refresh and self refresh modes
1.8V LVCMOS-compatible inputs
On-chip temp sensor to control self refresh rate
Partial-array self refresh (PASR)
Deep power-down (DPD)
Status read register (SRR)
Selectable output drive strength (DS)
Clock stop capability
64ms refresh
Table 1: Key Timing Parameters (CL = 3)
Speed Grade
-5
-54
-6
-75
Clock Rate (MHz)
200
185
166
133
Access Time
5.0ns
5.0ns
5.0ns
6.0ns
Options
V
DD
/V
DDQ
1.8V/1.8V
1.8V/1.2V
1
Configuration
32 Meg x 16 (8 Meg x 16 x 4 banks)
16 Meg x 32 (4 Meg x 32 x 4 banks)
Row-size option
JEDEC-standard option
Reduced page-size option
1
Plastic green package
60-ball VFBGA (8mm x 9mm)
2
90-ball VFBGA (10mm x 13mm)
3
90-ball VFBGA (9mm x 13mm)
3
Timing – cycle time
5ns @ CL = 3
5.4ns @ CL = 3
6ns @ CL = 3
7.5ns @ CL = 3
Power
Standard I
DD2
/I
DD6
Low-power I
DD2
/I
DD61
Operating temperature range
Commercial (0˚ to +70˚C)
Industrial (–40˚C to +85˚C)
Design revision
Notes:
Marking
H
HC
32M16
16M32
LF
LG
BF
CM
CX
-5
-54
-6
-75
None
L
None
IT
:B
1. Contact factory for availability.
2. Only available for x16 configuration.
3. Only available for x32 configuration.
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2004 Micron Technology, Inc. All rights reserved.
512Mb: x16, x32 Mobile LPDDR SDRAM
Features
Table 2: Configuration Addressing 512
Architecture
Configuration
Refresh count
Row addressing
Column addressing
32 Meg x 16
8 Meg x 16 x 4 banks
8K
A[12:0]
A[9:0]
16 Meg x 32
4 Meg x 32 x 4 banks
8K
A[12:0]
A[8:0]
Reduced Page-Size Option 16 Meg x 32
4 Meg x 32 x 4 banks
8K
A[13:0]
A[7:0]
Figure 1: 512Mb Mobile LPDDR Part Numbering
MT
Micron Technology
Product Family
46 = Mobile LPDDR
46
H 32M16 LF
BF
-6
L
IT
:B
Design Revision
:B = Second generation
Operating Temperature
Blank = Commercial (0°C to +70°C)
IT = Industrial (–40°C to +85°C)
Operating Voltage
H = 1.8V/1.8V
HC = 1.8V/1.2V
Power
Blank = Standard I
DD2
/I
DD6
L = Low-power I
DD2
/I
DD6
Configuration
32 Meg x 16
16 Meg x 32
Cycle Time
-5 = 5ns
t
CK, CL = 3
-54 = 5.4ns
t
CK, CL = 3
-6 = 6ns
t
CK, CL = 3
-75 = 7.5ns
t
CK, CL = 3
Addressing
LF = Mobile standard addressing
LG = Reduced page-size option
Package Codes
BF = 8mm x 9mm, VFBGA, green
CM = 10mm x 13mm, VFBGA, green
CX = 9mm x 13mm, VFBGA, green
FBGA Part Marking Decoder
Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the
part number. Micron’s FBGA part marking decoder is available at
www.micron.com/decoder.
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2004 Micron Technology, Inc. All rights reserved.
512Mb: x16, x32 Mobile LPDDR SDRAM
General Description ......................................................................................................................................... 8
Functional Block Diagrams ............................................................................................................................... 9
Ball Assignments and Descriptions ................................................................................................................. 11
Package Dimensions ...................................................................................................................................... 15
Electrical Specifications .................................................................................................................................. 18
Electrical Specifications – I
DD
Parameters ........................................................................................................ 22
Electrical Specifications – AC Operating Conditions ......................................................................................... 26
Output Drive Characteristics ........................................................................................................................... 30
Functional Description ................................................................................................................................... 34
Commands .................................................................................................................................................... 35
DESELECT ................................................................................................................................................ 36
NO OPERATION ........................................................................................................................................ 36
LOAD MODE REGISTER ............................................................................................................................ 36
ACTIVE ..................................................................................................................................................... 36
READ ........................................................................................................................................................ 37
WRITE ...................................................................................................................................................... 38
PRECHARGE ............................................................................................................................................. 39
BURST TERMINATE .................................................................................................................................. 40
AUTO REFRESH ........................................................................................................................................ 40
SELF REFRESH ........................................................................................................................................... 41
DEEP POWER-DOWN ................................................................................................................................ 41
Truth Tables ................................................................................................................................................... 42
State Diagram ................................................................................................................................................ 47
Initialization .................................................................................................................................................. 48
Standard Mode Register .................................................................................................................................. 51
Burst Length .............................................................................................................................................. 51
Burst Type ................................................................................................................................................. 52
CAS Latency .............................................................................................................................................. 53
Operating Mode ......................................................................................................................................... 54
Extended Mode Register ................................................................................................................................. 55
Temperature-Compensated Self Refresh .................................................................................................... 55
Partial-Array Self Refresh ........................................................................................................................... 56
Output Drive Strength ................................................................................................................................ 56
Status Read Register ....................................................................................................................................... 57
Bank/Row Activation ...................................................................................................................................... 59
READ Operation ............................................................................................................................................. 60
WRITE Operation ........................................................................................................................................... 71
PRECHARGE Operation .................................................................................................................................. 83
Auto Precharge ............................................................................................................................................... 83
Concurrent Auto Precharge ........................................................................................................................ 84
AUTO REFRESH Operation ............................................................................................................................. 89
SELF REFRESH Operation .............................................................................................................................. 90
Power-Down .................................................................................................................................................. 91
Deep Power-Down .................................................................................................................................... 93
Clock Change Frequency ................................................................................................................................ 95
Revision History ............................................................................................................................................. 96
Rev. I, Production – 12/09 ........................................................................................................................... 96
Rev. H, Production – 03/09 .......................................................................................................................... 96
Rev. G, Production – 02/09 .......................................................................................................................... 96
Rev. F, Production – 10/08 .......................................................................................................................... 96
Contents
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2004 Micron Technology, Inc. All rights reserved.
512Mb: x16, x32 Mobile LPDDR SDRAM
Rev. E, Production – 8/08 ............................................................................................................................
Rev. D, Production – 05/08 ..........................................................................................................................
Rev. C, Production – 03/08 ..........................................................................................................................
Rev. B, Preliminary – 12/07 .........................................................................................................................
Rev. A, Advance – 7/07 ................................................................................................................................
Revision History for Commands, Operations, and Timing Diagrams .............................................................
Update – 05/08 ...........................................................................................................................................
Update – 05/08 ...........................................................................................................................................
Update – 03/08 ...........................................................................................................................................
Update – 12/07 ...........................................................................................................................................
Update – 07/07 ...........................................................................................................................................
96
96
97
97
97
97
97
97
98
98
98
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2004 Micron Technology, Inc. All rights reserved.
512Mb: x16, x32 Mobile LPDDR SDRAM
Table 1: Key Timing Parameters (CL = 3) .......................................................................................................... 1
Table 2: Configuration Addressing 512 ............................................................................................................. 2
Table 3: VFBGA Ball Descriptions .................................................................................................................. 13
Table 4: Absolute Maximum Ratings .............................................................................................................. 18
Table 5: AC/DC Electrical Characteristics and Operating Conditions ............................................................... 18
Table 6: 1.2V I/O AC/DC Electrical Characteristics and Operating Conditions ................................................. 19
Table 7: Capacitance (x16, x32) ...................................................................................................................... 20
Table 8: I
DD
Specifications and Conditions (x16) ............................................................................................ 22
Table 9: I
DD
Specifications and Conditions (x32) ............................................................................................ 23
Table 10: I
DD6
Specifications and Conditions .................................................................................................. 24
Table 11: Electrical Characteristics and Recommended AC Operating Conditions ............................................ 26
Table 12: Target Output Drive Characteristics (Full Strength) .......................................................................... 30
Table 13: Target Output Drive Characteristics (Three-Quarter Strength) .......................................................... 31
Table 14: 1.2V I/O Target Output Drive Characteristics (Three-Quarter Strength) ............................................ 32
Table 15: Target Output Drive Characteristics (One-Half Strength) ................................................................. 33
Table 16: Truth Table – Commands ............................................................................................................... 35
Table 17: DM Operation Truth Table ............................................................................................................. 36
Table 18: Truth Table – Current State Bank
n
– Command to Bank
n
............................................................... 42
Table 19: Truth Table – Current State Bank
n
– Command to Bank
m
.............................................................. 43
Table 20: Truth Table – CKE .......................................................................................................................... 46
Table 21: Burst Definition Table .................................................................................................................... 52
List of Tables
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2004 Micron Technology, Inc. All rights reserved.
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