MT48LC64M8A2TG-75 IT:C TR,MT48LC64M8A2TG-75 IT:C TR pdf中文资料,MT48LC64M8A2TG-75 IT:C TR引脚图,MT48LC64M8A2TG-75 IT:C TR电路-Datasheet-电子工程世界

文档预览

512Mb: x4, x8, x16 SDRAM

Features

SDR SDRAM

MT48LC128M4A2 – 32 Meg x 4 x 4 banks

MT48LC64M8A2 – 16 Meg x 8 x 4 banks

MT48LC32M16A2 – 8 Meg x 16 x 4 banks

Features

• PC100- and PC133-compliant

• Fully synchronous; all signals registered on positive

edge of system clock

• Internal, pipelined operation; column address can

be changed every clock cycle

• Internal banks for hiding row access/precharge

• Programmable burst lengths: 1, 2, 4, 8, or full page

• Auto precharge, includes concurrent auto precharge

and auto refresh modes

• Self refresh mode

• Auto refresh

– 64ms, 8192-cycle refresh (commercial and

industrial)

• LVTTL-compatible inputs and outputs

• Single 3.3V ±0.3V power supply

Options

• Configurations

– 128 Meg x 4 (32 Meg x 4 x 4 banks)

– 64 Meg x 8 (16 Meg x 8 x 4 banks)

– 32 Meg x 16 (8 Meg x 16 x 4 banks)

• Write recovery (

WR)

–

WR = 2 CLK

• Plastic package – OCPL

– 54-pin TSOP II (400 mil) (standard)

– 54-pin TSOP II (400 mil) Pb-free

• Timing – cycle time

– 7.5ns @ CL = 3 (PC133)

– 7.5ns @ CL = 2 (PC133)

• Self refresh

– Standard

– Low power

• Operating temperature range

– Commercial (0˚C to +70˚C)

– Industrial (–40˚C to +85˚C)

• Revision

Notes:

1. See technical note TN-48-05 on

Micron's Web site.

2. Off-center parting line.

3. Available on x4 and x8 only.

4. Contact Micron for availability.

Marking

128M4

64M8

32M16

-75

-7E

None

Table 1: Key Timing Parameters

CL = CAS (READ) latency

Speed Grade

-7E

-75

-7E

-75

Clock

Frequency

143 MHz

133 MHz

100 MHz

Access Time

CL = 2

–

5.4ns

6ns

CL = 3

5.4ns

–

Setup Time

1.5ns

Hold Time

0.8ns

PDF: 09005aef809bf8f3

512Mb_sdr.pdf - Rev. R 05/15 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

512Mb: x4, x8, x16 SDRAM

Features

Table 2: Address Table

Parameter

Configuration

Refresh count

Row addressing

Bank addressing

Column

addressing

32 Meg x 4

32 Meg x 4 x 4 banks

8K A[12:0]

4 BA[1:0]

4K A[9:0], A11, A12

32 Meg x 8

16 Meg x 8 x 4 banks

8K A[12:0]

4 BA[1:0]

2K A[9:0], A11

32 Meg

x 16

8 Meg x 16 x 4 banks

8K A[12:0]

4 BA[1:0]

1K A[9:0]

Table 3: 512Mb SDR Part Numbering

Part Numbers

MT48LC128M4A2P

MT48LC128M4A2TG

MT48LC64M8A2P

MT48LC64M8A2TG

MT48LC32M16A2P

MT48LC32M16A2TG

Architecture

128 Meg x 4

64 Meg x 8

32 Meg x 16

Package

54-pin TSOP II

PDF: 09005aef809bf8f3

512Mb_sdr.pdf - Rev. R 05/15 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x4, x8, x16 SDRAM

Features

Contents

General Description ......................................................................................................................................... 6

Functional Block Diagrams ............................................................................................................................... 7

Pin and Ball Assignments and Descriptions ..................................................................................................... 10

Package Dimensions ....................................................................................................................................... 12

Temperature and Thermal Impedance ............................................................................................................ 13

Electrical Specifications .................................................................................................................................. 15

Electrical Specifications – I

Parameters ........................................................................................................ 17

Electrical Specifications – AC Operating Conditions ......................................................................................... 18

Functional Description ................................................................................................................................... 21

Commands .................................................................................................................................................... 22

COMMAND INHIBIT .................................................................................................................................. 22

NO OPERATION (NOP) ............................................................................................................................... 23

LOAD MODE REGISTER (LMR) ................................................................................................................... 23

ACTIVE ...................................................................................................................................................... 23

READ ......................................................................................................................................................... 24

WRITE ....................................................................................................................................................... 25

PRECHARGE .............................................................................................................................................. 26

BURST TERMINATE ................................................................................................................................... 26

REFRESH ................................................................................................................................................... 27

AUTO REFRESH ..................................................................................................................................... 27

SELF REFRESH ....................................................................................................................................... 27

Truth Tables ................................................................................................................................................... 28

Initialization .................................................................................................................................................. 33

Mode Register ................................................................................................................................................ 35

Burst Length .............................................................................................................................................. 37

Burst Type .................................................................................................................................................. 37

CAS Latency ............................................................................................................................................... 39

Operating Mode ......................................................................................................................................... 39

Write Burst Mode ....................................................................................................................................... 39

Bank/Row Activation ...................................................................................................................................... 40

READ Operation ............................................................................................................................................. 41

WRITE Operation ........................................................................................................................................... 50

Burst Read/Single Write .............................................................................................................................. 57

PRECHARGE Operation .................................................................................................................................. 58

Auto Precharge ........................................................................................................................................... 58

AUTO REFRESH Operation ............................................................................................................................. 70

SELF REFRESH Operation ............................................................................................................................... 72

Power-Down .................................................................................................................................................. 74

Clock Suspend ............................................................................................................................................... 75

PDF: 09005aef809bf8f3

512Mb_sdr.pdf - Rev. R 05/15 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x4, x8, x16 SDRAM

Features

List of Figures

Figure 1: 128 Meg x 4 Functional Block Diagram ............................................................................................... 7

Figure 2: 64 Meg x 8 Functional Block Diagram ................................................................................................. 8

Figure 3: 32 Meg x 16 Functional Block Diagram ............................................................................................... 9

Figure 4: 54-Pin TSOP (Top View) .................................................................................................................. 10

Figure 5: 54-Pin Plastic TSOP (400 mil) – Package Codes TG/P ......................................................................... 12

Figure 6: Example: Temperature Test Point Location, 54-Pin TSOP (Top View) ................................................. 14

Figure 7: ACTIVE Command .......................................................................................................................... 23

Figure 8: READ Command ............................................................................................................................. 24

Figure 9: WRITE Command ........................................................................................................................... 25

Figure 10: PRECHARGE Command ................................................................................................................ 26

Figure 11: Initialize and Load Mode Register .................................................................................................. 34

Figure 12: Mode Register Definition ............................................................................................................... 36

Figure 13: CAS Latency .................................................................................................................................. 39

Figure 14: Example: Meeting

RCD (MIN) When 2 <

RCD (MIN)/

CK < 3 .......................................................... 40

Figure 15: Consecutive READ Bursts .............................................................................................................. 42

Figure 16: Random READ Accesses ................................................................................................................ 43

Figure 17: READ-to-WRITE ............................................................................................................................ 44

Figure 18: READ-to-WRITE With Extra Clock Cycle ......................................................................................... 45

Figure 19: READ-to-PRECHARGE .................................................................................................................. 45

Figure 20: Terminating a READ Burst ............................................................................................................. 46

Figure 21: Alternating Bank Read Accesses ..................................................................................................... 47

Figure 22: READ Continuous Page Burst ......................................................................................................... 48

Figure 23: READ – DQM Operation ................................................................................................................ 49

Figure 24: WRITE Burst ................................................................................................................................. 50

Figure 25: WRITE-to-WRITE .......................................................................................................................... 51

Figure 26: Random WRITE Cycles .................................................................................................................. 52

Figure 27: WRITE-to-READ ............................................................................................................................ 52

Figure 28: WRITE-to-PRECHARGE ................................................................................................................. 53

Figure 29: Terminating a WRITE Burst ............................................................................................................ 54

Figure 30: Alternating Bank Write Accesses ..................................................................................................... 55

Figure 31: WRITE – Continuous Page Burst ..................................................................................................... 56

Figure 32: WRITE – DQM Operation ............................................................................................................... 57

Figure 33: READ With Auto Precharge Interrupted by a READ ......................................................................... 59

Figure 34: READ With Auto Precharge Interrupted by a WRITE ........................................................................ 60

Figure 35: READ With Auto Precharge ............................................................................................................ 61

Figure 36: READ Without Auto Precharge ....................................................................................................... 62

Figure 37: Single READ With Auto Precharge .................................................................................................. 63

Figure 38: Single READ Without Auto Precharge ............................................................................................. 64

Figure 39: WRITE With Auto Precharge Interrupted by a READ ........................................................................ 65

Figure 40: WRITE With Auto Precharge Interrupted by a WRITE ...................................................................... 65

Figure 41: WRITE With Auto Precharge ........................................................................................................... 66

Figure 42: WRITE Without Auto Precharge ..................................................................................................... 67

Figure 43: Single WRITE With Auto Precharge ................................................................................................. 68

Figure 44: Single WRITE Without Auto Precharge ............................................................................................ 69

Figure 45: Auto Refresh Mode ........................................................................................................................ 71

Figure 46: Self Refresh Mode .......................................................................................................................... 73

Figure 47: Power-Down Mode ........................................................................................................................ 74

Figure 48: Clock Suspend During WRITE Burst ............................................................................................... 75

Figure 49: Clock Suspend During READ Burst ................................................................................................. 76

Figure 50: Clock Suspend Mode ..................................................................................................................... 77

PDF: 09005aef809bf8f3

512Mb_sdr.pdf - Rev. R 05/15 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x4, x8, x16 SDRAM

Features

List of Tables

Table 1: Key Timing Parameters ....................................................................................................................... 1

Table 2: Address Table ..................................................................................................................................... 2

Table 3: 512Mb SDR Part Numbering ............................................................................................................... 2

Table 4: Pin and Ball Descriptions .................................................................................................................. 11

Table 5: Temperature Limits .......................................................................................................................... 13

Table 6: Thermal Impedance Simulated Values ............................................................................................... 14

Table 7: Absolute Maximum Ratings .............................................................................................................. 15

Table 8: DC Electrical Characteristics and Operating Conditions ..................................................................... 15

Table 9: Capacitance ..................................................................................................................................... 16

Table 10: I

Specifications and Conditions (-7E, -75) ..................................................................................... 17

Table 11: Electrical Characteristics and Recommended AC Operating Conditions (-7E, -75) ............................. 18

Table 12: AC Functional Characteristics (-7E, -75) ........................................................................................... 19

Table 13: Truth Table – Commands and DQM Operation ................................................................................. 22

Table 14: Truth Table – Current State Bank

Command to Bank

.................................................................. 28

Table 15: Truth Table – Current State Bank n, Command to Bank

................................................................. 30

Table 16: Truth Table – CKE ........................................................................................................................... 32

Table 17: Burst Definition Table ..................................................................................................................... 38

PDF: 09005aef809bf8f3

512Mb_sdr.pdf - Rev. R 05/15 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

【NUCLEO H533RE】AES软硬件算法对比测试: 完整的工程间附件，替换\STM32Cube_FW_H5_V1.2.0\Projects\NUC...; qinyunti stm32/stm8

STM32控制xaar XJ128打印机: 有人使用过XJ128的打印机喷头吗？ STM32控制xaar XJ128打印机哥们有相关资料么？...; xiazheng stm32/stm8

IMX6-A9系列：显示功能测试: MY-IMX6-A9系列：显示功能测试目录 1适用范围 1.1开发板型号...; 明远智睿Lan 综合技术交流

关于c51的编程求教大神: #include reg51.h unsigned cher code sz1 ={0xfe...; 木耳 51单片机

Matter 1.1 发布——助益产品和开发者: Matter 1.1 的发布是数百家公司和公司个人代表的共同成就，他们作为成员在连接标准联盟这一合...; 兰博 RF/无线

lm3s8962上的RT-Thread连载——简单的HTTP服务器: 本来是打算从内核开始写起，到网络，文件系统，GUI等一系列连载，发现自己写东西的速度太慢，按这样的...; shaolin 嵌入式系统

自动驾驶让传感器变得越来越聪明

翻译自——newelectronics，Neil Tyler AutoSens是汽车传感器和感知技术的会议，它将工程师和其他参与ADAS和自动驾驶市场的相关人员联系起来。这一届是在比利时布鲁塞尔举世闻名的AutoWorld博物馆举行，行业领导者齐聚一堂，研究并评估了ADAS的最新发展。到2025年，这个市场的价值预计将超过670亿美元，这并不都是智能科技发展的功劳，而是因为创新水...[详细]
全志科技芯片获小米扫地机器人及无人机产品采用

全志科技(300458)3月20日在投资者互动平台表示，小米使用公司的芯片，主要应用在小米扫地机器人及无人机系列产品上。 2017年全志科技公司实现营业收入12.01亿元，同比下降4.08%；归属于上市公司股东的净利润2106.85万元，同比下降85.83%。对于营收利润下滑原因，全志科技表示，主要受存储器件及显示屏等价格持续上涨影响，平板电脑市场需求受到抑制，销售收入比去年同期下降所致。同...[详细]
沈义人确认OPPO新机将会搭载骁龙730G

昨天知名数码博主@数码闲聊站曝光了OPPO一款新机的参数信息。图片显示，OPPO新机将采用6.5英寸的FHD+屏幕，机身尺寸为160×74.3×9.5(mm)，重量为189g，在用上Type-C接口的同时也保留了3.5mm耳机孔。硬件配置方面，OPPO新机搭载骁龙710处理器，前置1600万像素的摄像头，后置4800万像素+1300万像素+800万像素+200万像素的摄像头，内置4000毫安...[详细]
Akamai被评为零信任eXtended生态系统平台提供商的领导者

负责提供安全数字化体验的智能边缘平台阿卡迈技术公司（Akamai Technologies, Inc.，以下简称：Akamai）宣布其在“Forrester Wave™：2019年第四季度零信任eXtended生态系统平台提供商评估”（The Forrester Wave™: Zero Trust eXtended Ecosystem Platform Providers, Q4 2019 ev...[详细]
FPGA 65nm技术竞赛开锣

　　随着半导体工艺由130nm向90nm及65nm不断升级，带给FPGA(现场可编程逻辑器件)更高的密度、更快的速度、更低的成本，引得FPGA厂商不断追逐。但同时也带来了功耗提高等诸多挑战。继赛灵思公司5月份发布全球首款基于65nm工艺的FPGA产品Virtex-5系列平台后，近日Altera也宣布将推出基于65nm工艺的FPGA StratixⅢ。两大FPGA巨头争先恐后发布了65nm工艺的F...[详细]
STM8L之红外发射（定时器中断产生38K信号）

简介本文介绍STM8L系列如何使用红外发射管发射38K信号。其中，红外协议采用为最常见的NEC协议，38K信号由定时器产生。实验平台编译软件：IAR for STM8 1.42.2 硬件平台：stm8l101f3p6开发板仿真器：ST-LINK 库函数版本：STM8L_STMTouch_Lib_V1.1.0 硬件原理 1、发射管元器件附淘宝链接： https://det...[详细]
台积对手GlobalFoundries逊苹果送上A9订单

Apple Insider网站报导，由于晶片制造商格罗方德（GlobalFoundries）良率不如预期，苹果在最后关头回心转意，决定将30%的下一代iPhone A9 晶片订单，转给台积电。 Apple Insider引述凯基投顾分析师郭明錤的报告指出，格罗方德的A9晶片良率目前约30%，低于郭明錤所称量产基本要求的50%，因此，苹果据传已把部分订单转给台积电。他说，把订单转...[详细]
与PC/移动设备互联绝缘电阻测试仪更智能

　　绝缘电阻测试仪将配备更智能功能。着眼于工程师已惯于使用个人电脑(PC)、平板设备及智能手机，安捷伦于日前发布能透过无线技术与PC和移动设备互联的绝缘电阻测试仪，除可执行无线远端测试之外，亦可自动产生报告，藉此摆脱过去须手写测试资料后，再输入Excel软体程式的不便性，同时提高操作效率。　　安捷伦亚太区市场开发经理李骏杰表示，测量仪器与PC和移动设备互连，可实现更多元且更具便利性的测试功能...[详细]
意法推出一款RFID电子标签芯片

　　日前，意法半导体（ ST Microelectr ON ics ，简称 ST ）推出一款创新型 RFID 电子标签芯片。通过这一新款产品，技术设备可提供详细的设备保养与维修信息，例如完整的检修记录，进而加快原始设备厂商（ OEM ）和设备运营商的检修速度，并简化设备工作记录。　　全新 LRiS64K 整合了射频识别（ RFID ）电路 ...[详细]
苹果手表正在挤垮瑞士传统手表行业

　　瑞银(UBS)近日表示，智能手表正在逐步取代人们手腕上的传统机械手表，瑞士传统手表制造商的处境可能会变得更糟糕。分析师 Helen Brand 表示，除了劳力士(Rolex)之外，苹果 Apple Watch 的规模以及超越了任何一家瑞士手表品牌，而在此情况下最危险的是 Swatch 品牌。下面就随手机便携小编一起来了解一下相关内容吧。　　瑞士手表制造商并非没有看到消费者对智能可穿戴...[详细]
格力i铂当太空舱降临客厅时你尖叫了

　　什么样的空调能够让人尖叫?看惯了火柴盒似的空调，相信您见了格力这款i铂系列“太空舱”空调，定会觉得大开眼界。小编今天就为大家详细解读这款长相“怪异”的空调，如果您也觉得它很神奇，就随小编一起“尖叫”吧! 　　独特外形另人“尖叫” 　　传统的柜机空调大多呈火柴盒型，长方型机身中规中矩。因人们固有的这种柜机空调为长方形的概念，因此当小编被告知面前这台圆柱型机器是空调时，惊讶了!的确，它...[详细]
Vishay推出高力密度、高分辨的小型触控反馈执行器，适用于触摸屏、模拟器和操纵杆

日前，Vishay Intertechnology, Inc.宣布，推出适用于商用触摸屏、操纵杆和触摸开关面板的新型可定制触控反馈执行器---IHPT-1411AF-AB0。Vishay 定制电磁式IHPT-1411AF-AB0为小型两件式结构，带安装孔，便于安装和直接操作，具有高冲击脉冲和振动能力，可在嘈杂环境下或任何需要产生动作机械响应的场合提供清晰的触觉反馈。这款触控反馈执行器的工作温度...[详细]
准备好，新能源汽车要“弯道超车”

一年一度的高交会即将华丽登场，工业和信息化部作为高交会主办单位之一，今年将专设“新能源汽车及车联网专题馆”，围绕“绿色智能，畅行中国”主题，汇集产业龙头企业，展示新能源汽车整车、关键零部件和基础设施以及车联网技术和应用。对于新能源汽车，老百姓已不再陌生，发展新能源汽车已成为解决空气污染问题的重要“药方”之一。近日，工信部等7部门联合印发的《京津冀公交等公共服务领域新能源汽车推广工作方案》明...[详细]
浅谈电视系统中的音频加解嵌技术

　　摘　要:阐述了电视系统中的音频嵌入技术,音视频信号标准,嵌入格式和加解嵌在电视系统中的应用。通过使用音频嵌入技术,大大降低了电视信号的传输成本,提高了音频信号的传输质量,解决了音视频信号传输中不同步的问题,实现了音视频无损耗传输,提高了电视节目的质量。 0　引言：　　随着电视事业的飞速发展,数字电视技术也得到了突飞猛进的发展。在电视信号模数转换和传输的过程中,视频信号和音频信号的处理方式...[详细]
碳化硅（SiC）功率器件在新能源汽车中的深入应用解析

　　碳化硅具备耐高压、耐高温、高频、抗辐射等优良电气特性，它突破硅基半导体材料物理限制，成为第三代半导体核心材料。碳化硅材料性能优势引领功率器件新变革。　　功率器件的作用是实现对电能的处理、转换和控制。以碳化硅为衬底制成的功率器件相比硅基功率器件，具有耐高压、耐高温、能量损耗低、功率密度高等优势，可实现功率模块小型化、轻量化。相同规格的碳化硅基 MOSFET 与硅基MOSFET 相比，其尺...[详细]