INDEX
MX23C4096
4M-BIT [256K x 16] CMOS MASK ROM
FEATURES
•
•
•
•
•
256K x 16 organization (JEDEC pin out)
Single +5V power supply
Fast access time: 100/120/150/200ns
Totally static operation
Completely TTl compatible
• Operating current: 60mA
• Standby current: 100uA
• Package
- 40 pin DIP (600 mil)
- 44 pin PLCC
GENERAL DESCRIPTION
The MX23C4096 is a 5V only, 4M-bit, Read Only
Memory. It is organized as 512Kx16 bit. MX23C4096
has a static standby mode, and has an access time of
100/120/150/200ns. It is designed to be compatible with
all microprocessors and similar applications in which
high performance, large bit storage and simple interfac-
ing are important design considerations.
MX23C4096 offers automatic power-down, with power-
down controlled by the chip enable (CE/CE) input. When
CE/CE is not selected, the device automatically powers
down and remains in a low-power standby mode as long
as CE/CE stays in the unselected mode.
The OE/OE inputs as well as CE/CE input may be pro-
grammed either active High or Low.
PIN CONFIGURATION
40PDIP
NC
CE/CE
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
VSS
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
OE/OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
A17
A16
A15
A14
A13
A12
A11
A10
A9
VSS
A8
A7
A6
A5
A4
A3
A2
A1
A0
BLOCK DIAGRAM
CE/CE
OE/OE
CONTROL
LOGIC
OUTPUT
BUFFERS
Q0~Q15
MX23C4096
A0~A17
ADDRESS
INPUTS
.
.
.
.
.
.
.
.
Y-DECODER
X-DECODER
.
.
.
.
.
.
.
.
Y-DECODER
4M BIT
ROM
ARRAY
VCC
VSS
CE/CE
VCC
44 PLCC
Q13
Q14
Q15
6
PIN DESCRIPTION
A17
A16
A15
A14
40
39
A13
A12
A11
A10
A9
NC
NC
Q12
Q11
Q10
Q9
Q8
VSS
NC
Q7
Q6
Q5
Q4
7
1 44
12
MX23C4096
34
VSS
NC
A8
A7
A6
Symbol
A0~A17
Q0~Q15
CE/CE
OE/OE
VCC
VSS
Pin Function
Address Inputs
Data Outputs
Chip Enable Input
Output Enable Input
Power Supply Pin (+5V)
Ground Pin
17
18
23
29
28
A5
Q3
Q2
Q1
Q0
OE/OE
NC
A0
A1
A2
A3
P/N:PM0257
A4
REV. 1.3, OCT. 08, 1996
1
INDEX
MX23C4096
ABSOLUTE MAXIMUM RATINGS*
RATING
Ambient Operating Temperature
Storage Temperature
Applied Input Voltage
Applied Output Voltage
VCC to Ground Potential
VALUE
0° to 70°
C
C
-65°C to 125°C
-0.5V to 7.0V
-0.5V to 7.0V
-0.5V to 7.0V
*Notice:
Stress greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Ex-
posure to absolute maximum rating conditions for extended
period may affect reliability.
DC CHARACTERISTICS
(TA = -10° ~ 70°C, VCC = 5.0V
±
10%)
C
Item
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Power-Down Supply Current
Standby Supply Current
Operating Supply Current
Symbol
VOH
VOL
VIH
VIL
ILI
ILO
ICC3
ICC2
ICC1
MIN.
2.4V
-
2.2V
-0.3V
-
-
-
-
-
MAX.
-
0.4V
VCC+0.3V
0.8V
10uA
10uA
100uA
1.0mA
60mA
Conditions
IOH = -1.0mA
IOL = 2.1mA
VIN=0 to 5.5V
VOUT=0 to 5.5V
CE>VCC-0.2V
CE=VIH
Note1
CAPACITANCE
(TA = 25° f = 1.0 MHz (Note 2))
C,
Symbol
CIN
COUT
Parameter
Input Capacitance
Output Capacitance
Min.
Max.
10
10
Unit
pF
pF
Conditions
VIN=0V
VOUT=0V
P/N:PM0257
REV. 1.3, OCT. 08, 1996
2
INDEX
MX23C4096
AC CHARACTERISTICS
(TA = -10° ~ 70°C, VCC = 5.0V
±
10%)
C
23C4096-10
PARAMETER
Cycle Time
Address Access Time
Output Hold Timer After
Address Change
Chip Enable Access Time
Output Enable/Chip Select
Access Time
Output Low Z Delay
Output High Z Delay
tLZ
tHZ
0ns
-
-
30ns
0ns
-
-
30ns
0ns
-
-
30ns
0ns
-
-
30ns
Note 3
Note 4
tACE
tAOE
-
-
100ns -
50ns
-
120ns -
60ns
-
150ns -
70ns
-
200ns
90ns
SYMBOL
tCYC
tAA
tOH
MIN.
100ns
-
10ns
MAX.
-
23C4096-12
MIN.
120ns
MAX.
-
23C4096-15
MIN.
150ns
23C4096-20
MAX.
-
200ns
-
CONDITIONS
MAX. MIN.
-
200ns
100ns -
-
10ns
120ns -
-
10ns
150ns -
-
10ns
Note :
1. Measured with device selected at f=5 MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% tested.
3. Output low-impedance delay (tLZ) is measured from CE/OE going low.
4. Output high-impedance delay (tHZ) is measured from CE/OE going high.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V to 2.4V
10ns
1.5V
0.8V and 2.0V
See Figure1
P/N:PM0257
REV. 1.3, OCT. 08, 1996
3
INDEX
MX23C4096
TIMING DIAGRAM
PROPAGATION DELAY FROM ADDRESS (CE/OE=ACTIVE)
tCYC
ADDRESS
INPUTS
tAA
DATA OUT
VALID ADDRESS
tOH
VALID DATA
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
CE
tACE
OE
tAOE
tLZ
tHZ
DATA OUT
ORDER INFORMATION
Part No.
MX23C4096PC-10
MX23C4096PC-12
MX23C4096PC-15
MX23C4096PC-20
MX23C4096QC-10
MX23C4096QC-12
MX23C4096QC-15
MX23C4096QC-20
Access Time
100ns
120ns
150ns
200ns
100ns
120ns
150ns
200ns
Operating Current MAX.
60mA
60mA
60mA
60mA
60mA
60mA
60mA
60mA
Standby Current MAX.
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
Package
40 pin DIP
40 pin DIP
40 pin DIP
40 pin DIP
44 pin PLCC
44 pin PLCC
44 pin PLCC
44 pin PLCC
P/N:PM0257
REV. 1.3, OCT. 08, 1996
4
INDEX
MX23C4096
PACKAGE INFORMATION
40-PIN PLASTIC DIP (600 mil)
ITEM
A
B
C
D
E
F
G
H
I
J
K
L
M
MILLIMETERS
52.54 max.
2.03 [REF]
2.54 [TP]
.46 [Typ.]
48.22
1.52 [Typ.]
3.30±.25
.51 [REF]
3.94±.25
5.33 max.
15.22±.25
13.97±.25
.25 [Typ.]
INCHES
2.070 max.
.080 [REF]
.100 [TP]
.018 [Typ.]
1.900
.060 [Typ.]
.130±.010
.020 [REF]
1.55±.010
.210 max.
.600±.010
.550±.010
.010 [Typ.]
F
D
E
C
B
M
H
G
I
J
1
A
K
L
20
40
21
0~15¡
NOTE:
Each lead centerline is located within .25 mm[.01
inch] of its true position [TP] at maximum material condi-
tion.
44-PIN PLASTIC LEADED CHIP CARRIER (PLCC)
ITEM
A
B
C
D
E
F
G
H
I
J
K
L
M
N
MILLIMETERS
17.53±.12
16.59±.12
16.59±.12
17.53±.12
1.95
4.70 max.
2.55±.25
.51 min.
1.27 [Typ.]
.71±.10
.46±.10
15.50±.51
.63 R
.25 [Typ.]
INCHES
.690±.005
.653±.005
.653±.005
.690±.005
.077
.185 max.
.100±.010
.20 min.
.050 [Typ.]
.028±.004
.018±.004
.610±.020
.025 R
.010 [Typ.]
F G
H
I
K
17
18
13
7
6
A
B
1 44
40
39
33
C D
29
23
28
E
N
M
J
L
NOTE:
Each lead centerline is located within .25 mm[.01
inch] of its true position [TP] at maximum material condi-
tion.
P/N:PM0257
REV. 1.3, OCT. 08, 1996
5
