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MX30LF2G18AC

MX30LF4G18AC

3V, 2G/4G-bit NAND Flash Memory

MX30LFxG18AC

P/N: PM2129

REV. 1.4, January. 20, 2017

MX30LF2G18AC

MX30LF4G18AC

Contents

1. FEATURES........................................................................................................................................6

2. GENERAL DESCRIPTIONS .............................................................................................................7

Figure 1. Logic Diagram ......................................................................................................................... 7

2-1.

3-1.

ORDERING INFORMATION ...................................................................................................8

PIN DESCRIPTIONS .............................................................................................................11

3. PIN CONFIGURATIONS ...................................................................................................................9

4. BLOCK DIAGRAM ..........................................................................................................................13

5. SCHEMATIC CELL LAYOUT AND ADDRESS ASSIGNMENT ......................................................14

Table 1. Address Allocation .................................................................................................................. 14

6. DEVICE OPERATIONS ...................................................................................................................15

6-1.

Address Input/Command Input/Data Input........................................................................15

Figure 2. AC Waveforms for Command / Address / Data Latch Timing ............................................... 15

Figure 3. AC Waveforms for Address Input Cycle ................................................................................ 15

Figure 4. AC Waveforms for Command Input Cycle ............................................................................ 16

Figure 5. AC Waveforms for Data Input Cycle ..................................................................................... 16

Figure 6. AC Waveforms for Read Cycle ............................................................................................. 17

Figure 7. AC Waveforms for Read Operation (Intercepted by CE#) .................................................... 18

Figure 8. AC Waveforms for Read Operation (with CE# Don't Care)................................................... 19

Figure 9-1. AC Waveforms for Sequential Data Out Cycle (After Read) .............................................. 19

Figure 9-2. AC Waveforms for Sequential Data Out Cycle (After Read) - EDO Mode ......................... 20

Figure 10. AC Waveforms for Random Data Output ............................................................................ 21

Figure 11-1. AC Waveforms for Cache Read Sequential ..................................................................... 23

Figure 11-2. AC Waveforms for Cache Read Random ........................................................................ 25

6-2.

Page Read ............................................................................................................................17

6-3.

6-4.

6-5.

Cache Read Sequential .......................................................................................................22

Cache Read Random ...........................................................................................................24

Page Program ......................................................................................................................26

Figure 12. AC Waveforms for Program Operation after Command 80H .............................................. 26

Figure 13. AC Waveforms for Random Data In (For Page Program) ................................................... 27

Figure 14. AC Waveforms for Program Operation with CE# Don't Care .............................................. 28

P/N: PM2129

REV. 1.4, January. 20, 2017

MX30LF2G18AC

MX30LF4G18AC

6-6.

Cache Program ....................................................................................................................29

Figure 15-1. AC Waveforms for Cache Program ................................................................................. 30

Figure 15-2. AC Waveforms for Sequence of Cache Program ........................................................... 31

Figure 16. AC Waveforms for Erase Operation .................................................................................... 32

6-7.

6-8.

Block Erase ..........................................................................................................................32

ID Read .................................................................................................................................33

Table 2. ID Codes Read Out by ID Read Command 90H .................................................................... 33

Table 3. The Definition of Byte2~Byte4 of ID Table

.............................................................................. 34

Figure 17-1. AC Waveforms for ID Read Operation ............................................................................. 35

Figure 17-2. AC Waveforms for ID Read (ONFI Identifier) Operation

.................................................. 35

6-9.

Status Read ..........................................................................................................................36

Table 4. Status Output.......................................................................................................................... 36

Figure 18. Bit Assignment (HEX Data)

................................................................................................. 37

Figure 19. AC Waveforms for Status Read Operation ......................................................................... 37

6-10. Status Enhance Read ..........................................................................................................38

6-11. Block Protection Status Read ............................................................................................38

Figure 20. AC Waveforms for Status Enhance Operation .................................................................... 38

Table 5. Block-Protection Status Output

.............................................................................................. 39

Table 6. Address Cycle Definition of Block

........................................................................................... 39

Figure 21. AC Waveforms for Block Protection Status Read

............................................................... 39

Figure 22. AC waveforms for Reset Operation .................................................................................... 40

6-12. Reset .....................................................................................................................................40

6-13. Parameter Page Read (ONFI) ..............................................................................................41

Figure 23. AC waveforms for Parameter Page Read (ONFI) Operation ............................................. 41

Figure 24. AC Waveforms for Parameter Page Read (ONFI) Random Operation (For 05h-E0h) ....... 42

Table 7. Parameter Page (ONFI) ......................................................................................................... 43

Figure 25. AC waveforms for Unique ID Read Operation .................................................................... 45

Figure 26. AC waveforms for Unique ID Read Operation (For 05h-E0h) ............................................. 46

Table 8-1. Definition of Feature Address

.............................................................................................. 47

Table 8-2. Sub-Feature Parameter Table of Feature Address - 90h (Array Operation Mode).............. 47

Table 8-3.

Sub-Feature Parameter Table of Feature Address - A0h (Block Protection Operation) (note 1)

.........47

6-15-1. Set Feature (ONFI) ................................................................................................................. 48

Figure 27. AC Waveforms for Set Feature (ONFI) Operation ............................................................. 48

6-14. Unique ID Read (ONFI) ........................................................................................................45

6-15. Feature Set Operation (ONFI) .............................................................................................47

P/N: PM2129

REV. 1.4, January. 20, 2017

MX30LF2G18AC

MX30LF4G18AC

6-15-2. Get Feature (ONFI) ................................................................................................................. 49

Figure 28. AC Waveforms for Get Feature (ONFI) Operation .............................................................. 49

6-15-3. Secure OTP (One-Time-Programmable) Feature ................................................................ 50

Figure 29. AC Waveforms for OTP Data Read .................................................................................... 50

Figure 30. AC Waveforms for OTP Data Read with Random Data Output .......................................... 51

Figure 31. AC Waveforms for OTP Data Program ............................................................................... 52

Figure 32. AC Waveforms for OTP Data Program with Random Data Input........................................ 53

Figure 33. AC Waveforms for OTP Protection Operation .................................................................... 54

6-15-4. Block Protection .................................................................................................................... 55

Table 9. Definition of Protection Bits

.................................................................................................... 55

Figure 34. PT Pin and Block Protection Mode Operation

.................................................................... 56

6-16. Two-Plane Operations .........................................................................................................57

6-17. Two-plane Program (ONFI & Traditional)and Two-plane Cache Program (ONFI &

Traditional)......................................................................................................................................57

6-18. Two-plane Block Erase (ONFI & Traditional) .....................................................................57

Figure 35-1. AC Waveforms for Two-plane Program (ONFI) ............................................................... 58

Figure 35-2. AC Waveforms for Page Program Random Data Two-plane (ONFI) ............................... 59

Figure 36. AC Waveforms for Two-plane Cache Program (ONFI) ....................................................... 60

Figure 37. AC Waveforms for Two-plane Erase (ONFI) ....................................................................... 61

Figure 38. AC waveforms for Two-plane Program (Traditional) ........................................................... 61

Figure 39. AC waveforms for Two-plane Cache Program (Traditional) ................................................ 61

Figure 40. AC waveforms for Two-plane Erase (Traditional)................................................................ 62

Figure 41. Maximum Negative Overshoot Waveform .......................................................................... 63

7. PARAMETERS ................................................................................................................................63

7-1.

ABSOLUTE MAXIMUM RATINGS........................................................................................63

Figure 42. Maximum Positive Overshoot Waveform ............................................................................ 63

Table 10. Operating Range .................................................................................................................. 64

Table 11. DC Characteristics ................................................................................................................ 64

Table 12. Capacitance.......................................................................................................................... 65

Table 13. AC Testing Conditions .......................................................................................................... 65

Table 14. Program and Erase Characteristics...................................................................................... 65

Table 15. AC Characteristics ................................................................................................................ 66

8. OPERATION MODES: LOGIC AND COMMAND TABLES ............................................................67

Table 16. Logic Table ........................................................................................................................... 67

P/N: PM2129

REV. 1.4, January. 20, 2017

MX30LF2G18AC

MX30LF4G18AC

Table 17-1. HEX Command Table

........................................................................................................ 68

Table 17-2. Two-plane Command Set .................................................................................................. 68

8-1.

8-2.

R/B#: Termination for The Ready/Busy# Pin (R/B#) ........................................................69

Power On/Off Sequence ......................................................................................................71

Figure 43. R/B# Pin Timing Information

............................................................................................... 70

Figure 44. Power On/Off Sequence .................................................................................................... 71

8-2-1. WP# Signal ............................................................................................................................. 72

Figure 45-1. Enable Programming of WP# Signal ............................................................................... 72

Figure 45-2. Disable Programming of WP# Signal ................................................................................. 72

Figure 45-3. Enable Erasing of WP# Signal ......................................................................................... 72

Figure 45-4. Disable Erasing of WP# Signal ........................................................................................ 72

9. SOFTWARE ALGORITHM..............................................................................................................73

9-1.

Invalid Blocks (Bad Blocks) ...............................................................................................73

Figure 46. Bad Blocks

.......................................................................................................................... 73

Table 18. Valid Blocks

.......................................................................................................................... 73

Figure 47. Bad Block Test Flow

............................................................................................................ 74

Table 19. Failure Modes ....................................................................................................................... 74

9-2.

9-3.

9-4.

Bad Block Test Flow ............................................................................................................74

Failure Phenomena for Read/Program/Erase Operations ...............................................74

Program ................................................................................................................................75

Figure 48. Failure Modes ..................................................................................................................... 75

Figure 49. Program Flow Chart ............................................................................................................ 75

Figure 50. Erase Flow Chart ................................................................................................................ 76

Figure 51. Read Flow Chart ................................................................................................................. 76

9-5.

Erase .....................................................................................................................................75

10. PACKAGE INFORMATION .............................................................................................................77

11. REVISION HISTORY ......................................................................................................................79

P/N: PM2129

REV. 1.4, January. 20, 2017

型号	MX30LF4G18AC-TI	MX30LF2G18AC-TI	MX30LF2G18AC-XKI	MX30LF4G18AC-XKI
描述	IC FLASH 4G PARALLEL 48TSOP	IC FLASH 2G PARALLEL 48TSOP	IC FLASH 2G PARALLEL 63VFBGA	IC FLASH 4G PARALLEL 63VFBGA
是否Rohs认证	符合	符合	符合	符合
包装说明	TSOP1-48	TSOP1,	VFBGA,	VFBGA-63
Reach Compliance Code	unknown	compliant	unknown	unknown
JESD-30 代码	R-PDSO-G48	R-PDSO-G48	R-PBGA-B63	R-PBGA-B63
长度	18.4 mm	18.4 mm	11 mm	11 mm
内存密度	4194304 bit	2147483648 bit	2147483648 bit	4194304 bit
内存集成电路类型	FLASH	FLASH	FLASH	FLASH
内存宽度	8	8	8	8
功能数量	1	1	1	1
端子数量	48	48	63	63
字数	524288 words	268435456 words	268435456 words	524288 words
字数代码	512000	256000000	256000000	512000
工作模式	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
最高工作温度	85 °C	85 °C	85 °C	85 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C
组织	512KX8	256MX8	256MX8	512KX8
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	TSOP1	TSOP1	VFBGA	VFBGA
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
并行/串行	PARALLEL	PARALLEL	PARALLEL	PARALLEL
峰值回流温度（摄氏度）	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	260
编程电压	3 V	3 V	3 V	3 V
座面最大高度	1.2 mm	1.2 mm	1 mm	1 mm
最大供电电压 (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V
标称供电电压 (Vsup)	3 V	3 V	3 V	3 V
表面贴装	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS
温度等级	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
端子形式	GULL WING	GULL WING	BALL	BALL
端子节距	0.5 mm	0.5 mm	0.8 mm	0.8 mm
端子位置	DUAL	DUAL	BOTTOM	BOTTOM
处于峰值回流温度下的最长时间	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	40
宽度	12 mm	12 mm	9 mm	9 mm
Factory Lead Time	16 weeks	16 weeks	-	16 weeks
类型	SLC NAND TYPE	SLC NAND TYPE	-	SLC NAND TYPE
Base Number Matches	1	-	1	1

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