MX7672
High-Speed 12-Bit ADC With External
Reference Input Part
General Description
The MX7672 is a 12-bit, high-speed, BiCMOS, analog-to-
digital converter (ADC) that performs conversions in as
little as 3µs while consuming only 110mW of power. The
MX7672 is a plug-in replacement for AD7672.
The MX7672 requires an external -5V reference. A buff-
ered reference input minimizes reference current require-
ments and allows a single reference to drive several
ADCs. External reference specifications can be chosen
to suit the accuracy of the application. The ADC clock can
be driven from either a crystal or an external clock source,
such as a microprocessor (µP) clock.
Average input range is pin-selectable for 0 to +5V, 0 to
+10V, or ±5V, making the ADC ideal for data-acquisition
and analog input/output cards. A high-speed digital inter-
face (125ns data-access time) with three-state data out-
puts is compatible with most µPs.
Features
●
Plug-In Replacement for AD7672
●
12-Bit Resolution and Accuracy
●
Fast Conversion Time
• MX7672_ _03 - 3µs
• MX7672_ _05 - 5µs
• MX7672_ _10 - 10µs
●
Operates with +5V and -12V Supplies
●
Buffered Reference Input
●
Low 110mW Power Consumption
●
Choice of +5V, +10V, or ±5V Input Ranges
●
Fast 125ns Bus-Access Time
Ordering Information
appears at end of data sheet.
Applications
●
●
●
●
Pin Configurations
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
+
AIN1
Telecommunications
Sonar and Radar Signal Processing
High-Speed Data-Acquisition Systems
Personal Computer I/O Boards
AIN2
V
DD
V
SS
BUSY
24
23
22
21
20
19
18
17
16
15
14
13
Functional Diagram
V
REF
AGND
D11 (MSB)
D10
MX7672
CS
D9
D8
D7
D6
D5
D4
DGND
RD
CLKOUT
CLKIN
D0
D1
D2
D3
Pin Configurations continued on last page
PDIP
19-3126; Rev 1; 1/12
MX7672
High-Speed 12-Bit ADC With External
Reference Input Part
Absolute Maximum Ratings
V
DD
to DGND ..........................................................-0.3V to +7V
V
SS
to DGND ........................................................+0.3V to -17V
AGND to DGND ....................................... -0.3V to (V
DD
+ 0.3V)
AIN1, AIN2 to AGND ..............................................-15V to +15V
V
REF
to AGND .............................. (V
SS
- 0.3V) to (V
DD
+ 0.3V)
Digital Input Voltage to DGND
(CLKIN,
CS, RD)
.................................. -0.3V to (V
DD
+ 0.3V)
Digital Output Voltage to DGND
(D11–D0,
BUSY,
CLKOUT) .................. -0.3V to (V
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
PDIP (derate 13.3mW/°C above +70°C) ...................1067mW
PLCC (derate 10.5mW/°C above +70°C) ....................842mW
LCC (derate 10.2mW/°C above +70°C) ......................816mW
Operating Temperature Ranges
MX7672K_/L _ ....................................................0°C to +70°C
MX7672B_/C _ ............................................... -40°C to +85°C
MX7672T_/U _ ............................................. -55°C to +125°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow)
PDIP, LCC ...................................................................+260°C
PLCC ...........................................................................+245°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
DD
= +5V ±5%, V
SS
= -12V ±10%, V
REF
= -5V, slow-memory mode; f
CLK
= 4MHz for MX7672_ _03, f
CLK
= 2.5MHz for MX7672_
_05, f
CLK
= 1.25MHz for MX7672_ _10; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
ACCURACY (Note 1)
Resolution
N
MX7672C/L
Integral Nonlinearity
INL
Tested range ±5V
MX7672U, T
A
= +25°C
MX7672U
MX7672B/K/T
Differential Nonlinearity
DNL
12 bits, no missing codes over temperature
MX7672C/L/U
Unipolar Offset Error
MX7672B/K/T
MX7672C/L/U
Unipolar Gain Error
MX7672B/K/T
MX7672C/L/U
Bipolar Zero Error
MX7672B/K/T
MX7672C/L/U
Bipolar Gain Error
MX7672B/K/T
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
12
±1/2
±1/2
±3/4
±1
±0.9
±3
±4
±5
±6
±4
±6
±5
±7
±3
±4
±5
±6
±4
±6
±5
±7
LSB
LSB
LSB
LSB
LSB
LSB
Bits
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
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MX7672
High-Speed 12-Bit ADC With External
Reference Input Part
Electrical Characteristics (continued)
(V
DD
= +5V ±5%, V
SS
= -12V ±10%, V
REF
= -5V, slow-memory mode; f
CLK
= 4MHz for MX7672_ _03, f
CLK
= 2.5MHz for MX7672_
_05, f
CLK
= 1.25MHz for MX7672_ _10; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
Synchronous Clk
(12.5 clks)
Conversion Time
t
CONV
MIN
TYP
MAX
3.125
5
10
UNITS
LSB
MX7672_ _03
MX7672_ _05
MX7672_ _10
MX7672_ _03
MX7672_ _05
MX7672_ _10
3.0
4.8
9.6
Asynchronous Clk
(12 to 13 clks)
ANALOG AND REFERENCE INPUTS
Analog Input Current (AIN1/
AIN2)
V
REF
Input Range (Note 2)
V
REF
Input Current
LOGIC
Input Low Voltage
Input High Voltage
Input Current
Input Capacitance (Note 2)
Output Low Voltage
Output High Voltage
High-Impedance State Leakage
Current
High-Impedance State Output
Capacitance (Note 2)
POWER REQUIREMENTS
Supply Voltage
Supply Current
Power Dissipation
Power-Supply Rejection,
V
DD
Only
Power-Supply Rejection,
V
SS
Only
V
DD
V
SS
I
DD
I
SS
PD
V
INL
V
INH
I
IN
C
IN
V
OL
V
OH
I
LKG
3.25
5.2
10.4
3.5
±1.75
LSB
Unipolar input ranges 0 to +5V, 0 to +10V
Bipolar range ±5V
-5.05
mA
V
µA
V
V
-4.95
±3
CS, RD,
CLKIN
CS, RD,
CLKIN
CS, RD;
V
IN
= 0V to V
DD
CLKIN; V
IN
= 0V to V
DD
D11–D0,
BUSY,
CLKOUT, I
SINK
= 1.6mA
D11–D0,
BUSY,
CLKOUT,
I
SOURCE
= 200µA
D11–D0, V
OUT
= 0V to V
DD
4.0
2.4
0.8
±10
±20
10
0.4
µA
pF
V
V
±10
15
µA
pF
C
OUT
4.75
-13.2
CS
=
RD
= V
DD
, V
AIN1
= V
AIN2
= 5V,
BUSY
= HIGH
V
DD
= 5V, V
SS
= -12V
FS change, V
SS
= -12V, V
DD
= 4.75V
to 5.25V
FS change, V
DD
= 5V, V
SS
= -10.8V
to -13.2V
5
-12
5.25
-10.8
7
-12
V
mA
mW
LSB
LSB
110
±1/4
±1/2
179
±2
±1
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MX7672
High-Speed 12-Bit ADC With External
Reference Input Part
Timing Characteristics
(V
DD
= +5V, V
SS
= -12V, 100% production tested, unless otherwise noted.) (Note 3, Figures 7, 9, 10)
PARAMETER
CS
to
RD
Setup Time
(Note 2)
RD
to
BUSY
Delay
Data-Access Time (Note 4)
RD
Pulse Width (Note 2)
CS
to
RD
Hold Time
(Note 2)
Data-Setup Time After
BUSY
(Note 4)
Bus-Relinquish Time
(Note 5)
Delay Between Read
Operations
CLKIN to
BUSY
Delay
(Note 2)
RD
to CLKIN Setup/Hold
Time (Notes 2, 6)
SYMBOL CONDITIONS
T
A
= +25°C
ALL GRADES
MIN
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
T
A
= T
MIN
to T
MAX
MX7672K/L/B/C
MIN
0
TYP
MAX
T
A
= T
MIN
to T
MAX
MX7672T/U
MIN
0
TYP
MAX
UNITS
TYP
MAX
0
C
L
= 50pF
C
L
= 100pF
t
3
0
C
L
= 100pF
40
30
200
120
25
100
70
75
70
50
190
125
ns
270
170
ns
ns
ns
ns
100
90
ns
ns
ns
180
ns
ns
230
150
t
3
0
90
85
200
150
25
100
25
200
t
3
0
100
Note 1:
V
DD
= +5V, V
SS
= -12V, 1 LSB = FS/4096. Performance over power-supply tolerance is guaranteed by power-supply rejec-
tion test.
Note 2:
Guaranteed by design.
Note 3:
All inputs are 0 to +5V swing with t
r
= t
f
= 5ns (10% to 90% of +5V) and timed from a voltage level of +1.6V.
Note 4:
t
3
and t
6
are measured with the load circuits of Figure 1 and defined as the time required for an output to cross +0.8V or
+2.4V.
Note 5:
t
7
is defined as the time required for the data lines to change 0.5V when loaded with the circuit of Figure 2.
Note 6:
For predictable conversion times,
RD
to CLKIN falling edge must be outside this window. If t
10
< 25ns, conversion will skip
first falling CLKIN edge and start on second falling CLKIN edge. If t
10
> 100ns, conversion will start on first falling CLKIN
edge.
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4
MX7672
High-Speed 12-Bit ADC With External
Reference Input Part
Pin Description
PIN
24-PIN
—
1
2
3
4–11
12
13–16
17
18
19
20
21
22
23
24
28-PIN
1, 8, 15, 22
2
3
4
5–13
14
16–19
20
21
23
24
25
26
27
28
NAME
N.C.
AIN1
V
REF
AGND
D11–D4
DGND
D3–D0
CLKIN
CLKOUT
RD
CS
BUSY
V
SS
V
DD
AIN2
No Connection
Analog Input
Voltage-Reference Input
Analog Ground
Three-State Data Outputs. They are active when
CS
and
RD
are low. D11 is the
most significant bit.
Digital Ground
Three-State Data Outputs
Clock Input. Connect an external TTL-compatible clock to CLKIN. Alternatively,
insert a crystal or ceramic resonator between CLKIN and CLKOUT.
Clock Output. When using an external clock, an inverted CLKIN signal appears on
CLKOUT. See CLKIN description.
READ
Input. Along with
CS,
this active-low signal enables the three-state drivers
and starts a conversion.
CHIP SELECT.
Along with
RD,
this active-low signal enables the three-state drivers
and starts a conversion.
BUSY.
Low while a conversion is in progress.
BUSY
indicates converter status.
Negative Supply, -12V
Positive Supply, +5V
Analog Input
FUNCTION
Figure 1. Load Circuits for Access Time
Figure 2. Load Circuits for Bus-Relinquish Time
Figure 3. MX7672 Operational Diagram
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