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NC7SZD384 1-Bit Low Power Bus Switch with Level Shifting
June 1997
Revised December 2005
NC7SZD384
1-Bit Low Power Bus Switch with Level Shifting
General Description
The NC7SZD384 provides 1-bit of high-speed CMOS TTL-com-
patible bus switch. The low on resistance of the switch allows
inputs to be connected to outputs with minimal propagation
delay and without generating additional ground bounce noise.
The device is organized as a 1-bit switch with a bus enable (OE)
signal. When OE is LOW, the switch is on and Port A is con-
nected to Port B. When OE is HIGH, the switch is open and a
high-impedance state exists between the two ports. Reduced
voltage drive to the gate of the FET switch permits nominal level
shifting of 5V to 3.3V through the switch.
Features
O
Space saving SOT23 or SC70 5-lead package
O
Ultra small MicroPak
¥
Pb-Free leadless package
O
5
:
switch connection between two ports
O
Designed to be used in level-shifting applications
O
Minimal propagation delay through the switch
O
Low I
CC
O
Zero bounce in flow-through mode
O
Control inputs compatible with TTL level
Ordering Code:
Order
Number
NC7SZD384M5X
NC7SZD384P5X
NC7SZD384L6X
Package Product Code
Number
Top Mark
MA05B
MAA05A
MAC06A
8Z4D
Z4D
A4
Package Description
5-Lead SOT23, JEDEC MO-178, 1.6mm
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
Pb-Free 6-Lead MicroPak, 1.0mm Wide
Supplied As
3k Units on Tape and Reel
3k Units on Tape and Reel
5k Units on Tape and Reel
Pb-Free package per JEDEC J-STD-020B.
MicroPak
¥
is a trademark of Fairchild Semiconductor Corporation.
The “Absolute Maximum Ratings” are those values beyond which the safety
of the device cannot be guaranteed. The device should not be operated at these lim-
its. The parametric values defined in the Electrical Characteristics tables are not
guaranteed at the absolute maximum ratings. The “Recommended Operating Condi-
tions” table will define the conditions for actual device operation.
Note 2:
The input and output negative voltage ratings may be exceeded if the input
and output diode current ratings are observed.
Note 3:
Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
V
CC
Symbol
V
IK
V
IH
V
IL
V
OH
I
I
I
OFF
R
ON
Parameter
Maximum Clamp Diode Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
Input Leakage Current
“OFF” Leakage Current
Switch On Resistance (Note 5)
(V)
4.5
4.5–5.5
4.5–5.5
4.5–5.5
0–5.5
5.5
4.5
5.0
5.0
35.0
I
CC
Quiescent Supply Current
Switch On
Switch Off
5.5
5.5
5.5
0.8
0.8
1.5
10.0
2.5
mA
See Figure 3
2.0
0.8
Min
T
A
40
q
C to
85
q
C
Typ
(Note 4)
Max
Units
Conditions
I
IN
1.2
V
V
V
V
18 mA
r
1.0
r
10.0
7.0
7.0
50.0
P
A
P
A
:
:
:
P
A
mA
V
IN
0
d
V
IN
d
5.5V
V
IN
V
IN
V
IN
V
IN
0V, I
I
0V, I
I
2.4V, I
I
GND
V
CC
3.4V, I
O
V
CC
0
d
A, B,
d
V
CC
64 mA
30 mA
15 mA
0
V
CC
or GND, I
O
OE
OE
OE
'
I
CC
Increase in I
CC
per Input (Note 6)
5.0V, T
A
25
q
C.
0,
Control Input only.
Note 4:
All typical values are at V
CC
Note 5:
Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A
or B) pins.
Note 6:
Per TTL driven input (V
IN
3.4V, control input only). A and B pins do not contribute to I
CC.
3
www.fairchildsemi.com
NC7SZD384
AC Electrical Characteristics
T
A
Symbol
Parameter
V
CC
(V)
t
PHL
,
t
PLH
t
PZL
,
t
PZH
t
PLZ
,
t
PHZ
Note 7:
All typical values are V
CC
5.0V, T
A
25
q
C.
Output Disable Time
4.5–5.5
1.0
6.0
ns
Propagation Delay Bus-to-Bus
(Note 8)
Output Enable Time
4.5–5.5
1.5
7.5
ns
V
I
V
I
V
I
V
I
7V for t
PZL
OPEN for t
PZH
7V for t
PLZ
OPEN for t
PHZ
4.5–5.5
C
L
Min
40
q
C to
85
q
C
RD
Typ
(Note 7)
50 pF, RU
500
:
Max
0.25
Units
Conditions
Figure
Number
ns
V
I
OPEN
Figures
1, 2
Figures
1, 2
Figures
1, 2
Note 8:
This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the
switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
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