NCN5121
Transceiver for KNX
Twisted Pair Networks
Introduction
NCN5121 is a receiver−transmitter IC suitable for use in KNX
twisted pair networks (KNX TP1−256). It supports the connection of
actuators, sensors, microcontrollers, switches or other applications in
a building network.
NCN5121 handles the transmission and reception of data on the bus.
It generates from the unregulated bus voltage stabilized voltages for its
own power needs as well as to power external devices, for example, a
microcontroller.
NCN5121 assures safe coupling to and decoupling from the bus.
Bus monitoring warns the external microcontroller in case of loss of
power so that critical data can be stored in time.
Key Features
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QFN40
MN SUFFIX
CASE 485AU
1 40
MARKING DIAGRAM
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
9600 baud KNX Communication Speed
Supervision of KNX Bus Voltage and Current
Supports Bus Current Consumption up to 24 mA
High Efficient DC−DC Converters
♦
3.3 V Fixed
♦
1.2 V to 21 V Selectable
Control and Monitoring of Power Regulators
Linear 20 V Regulator
Buffering of Sent Data Frames (Extended Frames Supported)
Selectable UART or SPI Interface to Host Controller
Selectable UART and SPI baud Rate to Host Controller
Optional CRC on UART to the Host
Optional Received Frame−end with MARKER Service
Optional Direct Analog Signaling to Host
Operates with Industry Standard Low Cost 16 MHz Quartz
Generates Clock of 8 or 16 MHz for External Devices
Auto Acknowledge (optional)
Auto Polling (optional)
Temperature Monitoring
Extended Operating Temperature Range −40°C to +105°C
These Devices are Pb−Free and are RoHS Compliant
NCN5121
21420−005
AWLYYWWG
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 57 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
1
September, 2016 − Rev. 1
Publication Order Number:
NCN5121/D
NCN5121
BLOCK DIAGRAM
CEQ1
CEQ2
VFILT
TRIG
VDDA
VSSA
VDDD
VSSD
Bus Coupler
CAV
VBUS1
Impedance
Control
Receiver
SPI
CCP
KNX
DLL
UART
Interface
Controller
SCK/UC2
SDI/RXD
SDO/TXD
CSB/UC1
TREQ
MODE1
MODE2
Mode
TXO
Transmitter
VBUS2
FANIN
Fan−In
Control
NCN5121
DC/DC
Converter 1
VIN
VSW1
VDD1M
VDD1
VSS1
V20V
20V LDO
POR
RC
OSC
VSW2
TW
TSD
UVD
DC/DC
Converter 2
VDD2MC
VDD2MV
VDD2
ANALOG
BUFFER
Diagnostics
VSS2
XTAL1
XTAL2
OSC
XSEL
XCLKC
XCLK
ANAOUT
SAVEB
RESETB
Figure 1. Block Diagram NCN5121
PIN OUT
VDDA
ANAOUT
FANIN
RESETB
SAVEB
XTAL1
XTAL2
XSEL
XCLK
VSSD
40
39
38
37
36
35
34
33
32
VSSA
VBUS2
TXO
CCP
CAV
VBUS1
CEQ1
CEQ2
VFILT
V20V
31
1
2
3
4
5
6
7
8
9
10
30
29
28
27
NCN5121
26
25
24
23
22
21
VDDD
SCK/UC2
SDO/TXD
SDI/RXD
CSB/UC1
TREQ
MODE2
MODE1
TRIG
XCLKC
12
13
14
15
16
17
18
19
Figure 2. Pin Out NCN5121 (Top View)
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2
VDD2MV
VDD2MC
VDD2
VSS2
VSW2
VIN
VSW1
VSS1
VDD1
VDD1M
20
11
NCN5121
PIN DESCRIPTION
Table 1. PIN LIST AND DESCRIPTION
Name
VSSA
VBUS2
TX0
CCP
CAV
VBUS1
CEQ1
CEQ2
VFILT
V20V
VDD2MV
VDD2MC
VDD2
VSS2
VSW2
VIN
VSW1
VSS1
VDD1
VDD1M
XCLKC
TRIG
MODE1
MODE2
TREQ
CSB/UC1
SDI/RXD
SDO/TXD
SCK/UC2
VDDD
VSSD
XCLK
XSEL
XTAL2
XTAL1
SAVEB
RESETB
FANIN
ANAOUT
VDDA
NOTE:
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Description
Analog Supply Voltage Ground
Ground for KNX Transmitter
KNX Transmitter Output
AC coupling external capacitor connection
Capacitor connection to average bus DC voltage
KNX power supply input
Capacitor connection 1 for defining equalization pulse
Capacitor connection 2 for defining equalization pulse
Filtered bus voltage
20V supply output
Voltage monitor of Voltage Regulator 2
Current monitor input 1 of Voltage Regulator 2
Current monitor input 2 of Voltage Regulator 2
Voltage Regulator 2 Ground
Switch output of Voltage Regulator 2
Voltage Regulator 1 and 2 Power Supply Input
Switch output of Voltage Regulator 1
Voltage Regulator 1 Ground
Current Input 2 and Voltage Monitor Input of Voltage Regulator 1
Current Monitor Input 1 of Voltage Monitor 1
Clock Frequency Configure
Transmission Trigger Output
Mode Selection Input 1
Mode Selection Input 2
Transmit Request Input
Chip Select Output (SPI) or Configuration Input (UART)
or 20 V LDO Disable (Analog Mode)
Serial Data Input (SPI) or Receive Input (UART)
Serial Data Output (SPI) or Transmit Output (UART)
Serial Clock Output (SPI) or Configuration Input (UART)
or Voltage Regulator 2 Disable (Analog Mode)
Digital Supply Voltage Input
Digital Supply Voltage Ground
Oscillator Clock Output
Clock Selection (Quartz or Digital Clock)
Clock Generator Output (Quartz) or Input (Digital Clock)
Clock Generator Input (Quartz)
Save Signal (open drain with pull−up)
Reset Signal (open drain with pull−up)
Fan−In Input
Analog Signal Output
Analog Supply Voltage Input
Type
Supply
Supply
Analog Output
Analog I/O
Analog I/O
Supply
Analog I/O
Analog I/O
Supply
Supply
Analog Input
Analog Input
Analog Input
Supply
Analog Output
Supply
Analog Output
Supply
Analog Input
Analog Input
Digital Input
Digital Output
Digital Input
Digital Input
Digital Input
Digital Output or
Digital Input
Digital Input
Digital Output
Digital Output or
Digital Input
Supply
Supply
Digital Output
Digital Input
Analog Output or
Digital Input
Analog Input
Digital Output
Digital Output
Digital Input
Analog Output
Supply
Type 13
Type 12
Type 10 or 14
Type 10
Type 15
Type 15
Type 11
Type 16
Type 7
Type 8
Type 9
Type 12
Type 13
Type 12
Type 12
Type 12
Type 13 or 14
Type 14
Type 13
Type 13 or 14
Type 7
Type 6
Type 5
Type 6
Type 1
Type 2
Type 3
Type 5
Type 4
Type 4
Type 5
Type 5
Type 8
Type 9
Type 8
Equivalent
Schematic
Type of CSB/UC1 and SCK/UC2 is depending on status MODE1 − MODE2 pin
Type of XTAL1 and XTAL2 pin is depending on status XSEL pin.
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NCN5121
EQUIVALENT SCHEMATICS
Following figure gives the equivalent schematics of the user relevant inputs and outputs. The diagrams are simplified
representations of the circuits used.
CCP
60V
TXO
60V
60V
CAV
7V
CEQx
60V
Type 1: TXO−pin
Type 2: CCP−pin
Type 3: CAV−pin
VIN
Type 4: CEQ1 and CEQ2−pin
VBUS1
VFILT
V20V
VIN
VDDD
VDDA
60V
VBUS1
60V
VFILT
60V
V20V
60V
VIN
VSWx
60V
VDDD
7V
VDDA
7V
Type 5: VBUS1−, VFILT−, V20V and VIN−pin
Type 6: VSW1 and VSW2−pin
VDD1
Type 7: VDDD− and VDDA−pin
VDD2
7V
7V
VDD1
7V
VDD2
60V
VDD2MV
7V
VDD1M
7V
VDD2MC
60V
Type 8: VDD1−, VDD2− and VDD2MV−pin
VDDD
VDDD
Type 9: VDD1M− and VDD2MC−pin
VAUX
VDDD
XTAL2
XTAL1
FANIN
7V
IN
R
DOWN
Type 10: XTAL1− and XTAL2−pin
Type 11: FANIN−pin
Type 12: MODE1−, MODE2−,
TREQ−, XCLKC− and XSEL−pin
VDDA
VDDD
VDDD
VDDD
R
UP
OUT
IN
OUT
ANAOUT
Type 13: CSB/UC1−,
SDO/TXD−, SCK/UC2−,
TRIG− and XCLK−pin
NOTE:
Type 14: CSB/UC1−,
SDI/RXD−, SCK/UC2
and XTAL2−pin
Type 15: RESETB− and
SAVEB−pin
Type 16: ANAOUT
Type of CSB/UC1 and SCK/UC2 is depending on status MODE1 − MODE2 pin
Type of XTAL1 and XTAL2 pin is depending on status XSEL pin.
Figure 3. In− and Output Equivalent Diagrams
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NCN5121
ELECTRICAL SPECIFICATION
Table 2. ABSOLUTE MAXIMUM RATINGS
(Notes 1 and 2)
Symbol
V
TXO
I
TXO
V
CCP
V
CAV
V
BUS1
V
ANAOUT
I
BUS1
V
CEQ
V
FILT
V
20V
V
DD2MV
V
DD2MC
V
DD2
V
SW
V
IN
V
DD1
V
DD1M
V
DIG
V
DD
V
XTAL
T
ST
T
J
V
HBM
KNX Transmitter Output Voltage
KNX Transmitter Output Current (Note 3)
Voltage on CCP−pin
Voltage on CAV−pin
Voltage on VBUS1−pin
Voltage on ANAOUT pin
Current Consumption VBUS1−pin
Voltage on pins CEQ1 and CEQ2
Voltage on VFILT−pin
Voltage on V20V−pin
Voltage on VDD2MV−pin
Voltage on VDD2MC−pin
Voltage on VDD2−pin
Voltage on VSW1− and VSW2−pin
Voltage on VIN−pin
Voltage on VDD1−pin
Voltage on VDD1M−pin
Voltage on pins MODE1, MODE2, TREQ, CSB/UC1, SDI/TXD, SDO/RXD, SCK/
UC2, XCLK, XSEL, SAVEB, RESETB, XCLKC, TRIG, and FANIN
Voltage on VDDD− and VDDA−pin
Voltage on XTAL1− and XTAL2−pin
Storage temperature
Junction Temperature (Note 4)
Human Body Model electronic discharge immunity (Note 5)
−10.5
−0.3
−0.3
−0.3
0
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−55
−40
−2
Parameter
Min
−0.3
Max
+45
250
+14.5
+3.6
+45
+3.6
120
+45
+45
+25
+3.6
+45
+45
+45
+45
+3.6
+3.6
+3.6
+3.6
+3.6
+150
+155
+2
Unit
V
mA
V
V
V
V
mA
V
V
V
V
V
V
V
V
V
V
V
V
V
°C
°C
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Convention: currents flowing in the circuit are defined as positive.
2. VBUS2, VSS1, VSS2, VSSA and VSSD form the common ground. They are hard connected to the PCB ground layer.
3. Room temperature, 27
W
shunt resistor for transmitter, 250 mA over temperature range.
4. Normal performance within the limitations is guaranteed up to the Thermal Warning level. Between Thermal Warning and Thermal Shutdown
temporary loss of function or degradation of performance (which ceases after the disturbance ceases) is possible.
5. According to JEDEC JESD22−A114.
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