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NCP1209P45

IC SWITCHING CONTROLLER, 48.1 kHz SWITCHING FREQ-MAX, PDIP8, PLASTIC, DIP-8, Switching Regulator or Controller

器件类别:电源/电源管理    电源电路   

厂商名称:ON Semiconductor(安森美)

厂商官网:http://www.onsemi.cn

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器件参数
参数名称
属性值
厂商名称
ON Semiconductor(安森美)
Objectid
1934374888
零件包装代码
DIP
包装说明
DIP,
针数
8
Reach Compliance Code
unknown
ECCN代码
EAR99
compound_id
8947831
模拟集成电路 - 其他类型
SWITCHING CONTROLLER
控制模式
VOLTAGE-MODE
控制技术
PULSE WIDTH MODULATION
最大输入电压
16 V
最小输入电压
8.6 V
标称输入电压
10 V
JESD-30 代码
R-PDIP-T8
长度
9.78 mm
功能数量
1
端子数量
8
最高工作温度
85 °C
最低工作温度
-25 °C
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装形状
RECTANGULAR
封装形式
IN-LINE
认证状态
Not Qualified
座面最大高度
4.45 mm
表面贴装
NO
切换器配置
SINGLE
最大切换频率
48.1 kHz
温度等级
OTHER
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
宽度
7.62 mm
文档预览
NCP1209
Product Preview
PWM Voltage Mode
Controller
The NCP1209P series is an enhanced version of the MC44608P
series. It is a high performance voltage mode controller designed for
fly–back SMPS.
These 2 series are pin to pin compatible. The device is a Power
MOSFET driver offering a discrete approach (controller + discrete
MOSFET) for building an offline SMPS.
It features a very high efficiency stand–by management consisting
in a fully controlled and adaptable Pulsed Mode operation working in
conjunction with a secondary reconfiguration.
Features
http://onsemi.com
SMPS CONTROLLER WITH
ENHANCED STAND–BY
MANAGEMENT
MARKING
DIAGRAMS
8
8
1
SO–8
CASE 751
PLASTIC
1
8
DIP–8
CASE 626
PLASTIC
1
1
TBD
TBD
45 kHz, 65 kHz, 77 kHz
7% Frequency Accuracy Over the Whole Temp Range
Extended V
CC
Working Range 8.6 V to 16 V
Programmable Stand–by Burst Duty Cycle
Stand–by Mode Selection from the Secondary Side of the SMPS
5 mA VHV Start–up Current Source
Device Inhibition Through Start–up Current Source Reduction
Energy Management in Set Top Box
Opto Feed–back Offline SMPS
SMPS Using a Secondary Reconfiguration for the Stand–by Mode
Ability to Adapt the MOSFET Gate Drive
All General Purpose Fly–back SMPS
Typical Applications
8
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
xx
A
WL, L
YY, Y
WW, W
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN CONNECTIONS
DMG 1
ICS 2
CTRL 3
GND 4
(Top View)
8 Vi
7 NC
6 V
CC
5 OUT
ORDERING INFORMATION
Device
NCP1209P45
NCP1209P65
NCP1209P77
Package
TBD
TBD
TBD
Shipping
TBD
TBD
TBD
©
Semiconductor Components Industries, LLC, 2002
1
January, 2002– Rev. 0
Publication Order Number:
NCP1209/D
NCP1209
MAINS
RFI
FILTER
1
+
+
3
+
SECONDARY
RECONFIGURATION
+
3
+
1
2
3
4
DMG
ICS
CTRL V
CC
GND OUT
V
i
8
7
6
5
OFF = Pulsed Mode
No Specific
Connection to
the Primary
Side
Figure 1. Typical Application Example
MAXIMUM RATINGS
Rating
V
CC
voltage
Pin 3 sink and source current
VHV pin8 voltage
Total power supply current
All inputs except Vi
Power dissipation and Thermal characteristics
Thermal Resistance, Junction to Air PDIP
Thermal Resistance, Junction to Air SOIC
Maximum power dissipation at T
A
= 85°C PDIP
Maximum power dissipation at T
A
= 85°C SOIC
Operating Junction Temperature
Operating Ambient Temperature
Symbol
V
CC
I
pin3
V
pin8
I
CC
V
inputs
R
θJA
R
θJA
P
D
P
D
T
J
T
A
Value
18
±3
500
20
–1.0 to +16
100
178
600
365
150
–25 to +85
Unit
V
mA
V
mA
V
°C/W
°C/W
mW
mW
°C
°C
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2
NCP1209
ELECTRICAL CHARACTERISTICS
(V
CC
= 10 V, T
J
= 0°C up 105°C, Output Loaded with 1 nF)
Characteristic
Output Section
Output Resistor
Sink
Source
Output Voltage Rise Time (from 3 V up to 8 V)
Output Voltage Falling Edge Slew–Rate (from 8 V down to 3 V)
Control Input Section
Duty Cycle @ I
pin3
= 450
µA
Duty Cycle @ I
pin3
= 225
µA
Control Input Clamp Voltage (Switching phase) @ I
pin3
= –225
µA
Latched–off Phase Control Input (stand–by) @ I
pin3
= 75
µA
Latched–off Phase Control Input (stand–by) @ I
pin3
= 37
µA
Internal Pin3 Resistance
(I
supply
– I
CC
) / I
pin3
(75
µA)
(I
supply
– I
CC
) / I
pin3
(75
µA)
Current Sense Section
Maximum Sense Input Threshold
Input Bias Current
Current Sense Source Current during Start–up Phase
Stand–by Current Sense Input Current
LEB + Propagation Delay (P45)
LEB + Propagation Delay (P65)
LEB + Propagation Delay (P77)
Current Sense Propagation Delay (Pin2 to OUT) (P45)
Current Sense Propagation Delay (Pin2 to OUT) (P65)
Current Sense Propagation Delay (Pin2 to OUT) (P77)
Leading Edge Blanking T
DLY
– T
prg
(P45)
Leading Edge Blanking T
DLY
– T
prg
(P65)
Leading Edge Blanking T
DLY
– T
prg
(P77)
V
CS–th
I
B–cs
I
CS–stup
I
CS–stby
T
DLY
T
DLY
T
DLY
T
prg
T
prg
T
prg
T
LEB
T
LEB
T
LEB
0.9
–1.8
180
97
TBD
TBD
TBD
TBD
TBD
TBD
1.0
200
100
TBD
TBD
350
TBD
TBD
175
TBD
TBD
TBD
1.05
+1.8
220
103
TBD
TBD
TBD
TBD
TBD
TBD
V
mA
mA
mA
ns
ns
ns
ns
ns
ns
ns
ns
ns
D
450
µA
D
225
µA
V
shunt
V
LP–STBY
V
LP–STBY
R
int3
K3(75)
K3(37)
TBD
4.65
TBD
43
4.9
TBD
TBD
2
20
20
0
TBD
5.15
TBD
%
%
V
V
V
kΩ
W
R
OL
R
OH
t
r
t
f
5
8.5
15
50
50
15
ns
ns
Symbol
Min
Typ
Max
Unit
Oscillator Section
Normal Operation Frequency (P45)
Normal Operation Frequency (P65)
Normal Operation Frequency (P77)
Maximum Duty Cycle @ f = f
osc
f
osc
f
osc
f
osc
d
max
41.8
60.45
71.6
76
45
65
77
80
48.1
69.55
82.4
84
kHz
kHz
kHz
%
Overvoltage Section
OVP threshold level on V
CC
V
cc–ovp
15.9
16.4
16.9
V
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3
NCP1209
ELECTRICAL CHARACTERISTICS
(V
CC
= 10 V, T
J
= 0°C up 105°C, Output Loaded with 1 nF)
Characteristic
Symbol
Min
Typ
Max
Unit
Demagnetisation Detection Section
Demag Comparator Threshold (V
pin1
decreasing)
Demag Comparator Hysteresis
Propagation Delay (Input to Output, Low to High)
Input Bias Current (V
demag
= 50mV)
Negative Clamp Level @ I
demag
= 50
µA
Positive Clamp Level @ I
demag
= 50
µA
V
dmg–th
H
dmg
T
PHL(In/Out)
I
dem–Ib
V
cl–neg–dem
V
cl–pos dem
45
–0.6
–0.9
9
50
30
300
–0.7
10
55
–0.4
11
mV
mV
ns
mA
V
V
Overtemperature Section
Overtemp
150
°C
Normal Mode Recovery Section
Demagnetisation Voltage for Normal Mode Recovery
Vdem NM
2.38
2.4
2.52
V
Supply Section
Start–up Voltage
Output Disabling V
CC
V
CC
Voltage for Istart–up activation
1
st
level start–up HV Current Source @ V
CC
< 1.5 V
2
nd
level start–up HV Current Source @ V
CC
> 3 V
2
nd
level start–up HV Current Source @ V
CC
= 10 V
Start–up Current Source Leakage
I
CC
when Switching (P45)
I
CC
when Switching (P65)
I
CC
when Switching (P77)
I
CC
in the Latched Off Phase
Hiccup Mode Duty Cycle
V
stup
V
uvlo1
V
uvlo2
I
CC1
I
CC2L
I
CC2H
I
stup lk
I
CCS
I
CCS
I
CCS
I
CCOFF
D
hiccup
11.8
8.2
5.03
100
3.2
2.2
TBD
TBD
2.2
350
12.4
8.6
5.3
200
4.2
3.2
70
2.6
500
12.5
13
9
5.5
300
4.8
3.8
TBD
TBD
3
650
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
%
http://onsemi.com
4
NCP1209
PACKAGE DIMENSIONS
DIP–8
CASE 626–05
ISSUE L
8
5
–B–
1
4
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
---
10
_
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
---
10
_
0.030
0.040
F
NOTE 2
–A–
L
C
–T–
SEATING
PLANE
J
N
D
K
M
M
T A
M
H
G
0.13 (0.005)
B
M
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