NCP5388
2/3/4 Phase Buck Controller
for VR10 and VR11 Pentium
IV Processor Applications
The NCP5388 is a two−, three−, or four−phase buck controller
which combines differential voltage and current sensing, and
adaptive voltage positioning to power Intel’s most demanding
Pentium
®
IV Processors and low voltage, high current power
supplies. Dual−edge pulse−width modulation (PWM) combined with
inductor current sensing reduces system cost by providing the fastest
initial response to transient loads thereby requiring less bulk and
ceramic output capacitors to satisfy transient load−line requirements.
A high performance operational error amplifier is provided, which
allows for easy compensation of the system. The proprietary method
of Dynamic Reference Injection makes the error amplifier
compensation virtually independent of the system response to VID
changes, eliminating the need for tradeoffs between load transients
and Dynamic VID performance.
Features
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MARKING
DIAGRAM
1
1
40
40 PIN QFN, 7x7
MN SUFFIX
CASE 488AG
NCP5388
AAWLYYWWG
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Meets Intel’s VR 10.0, 10.1, 10.2, and 11.0 Specifications
Dual−Edge PWM for Fastest Initial Response to Transient Loading
High Performance Operational Error Amplifier
Supports both VR11 and Legacy VR10 Soft−Start Modes
Dynamic Reference Injection
8−Bit DAC per Intel’s VR11 Specifications
DAC Range from 0.5 V to 1.6 V
"0.75%
System Voltage Accuracy
Remote Temperature Sensing per VR11
2, 3, or 4−Phase Operation
True Differential Remote Voltage Sensing Amplifier
Phase−to−Phase Current Balancing
“Lossless” Differential Inductor Current Sensing
Differential Current Sense Amplifiers for each Phase
Adaptive Voltage Positioning (AVP)
Fixed No−Load Voltage Positioning at –19 mV
Frequency Range: 100 kHz–1.0 MHz
Latched Overvoltage Protection (OVP)
Threshold Sensitive Enable Pin for VTT Sensing
Power Good Output with Internal Delays
Programmable Soft−Start Time
Operates from 12 V
This is a Pb−Free Device*
Pentium IV Processors
VRM Modules
Graphics Cards
Low Voltage, High Current Power Supplies
NCP5388 = Specific Device Code
AA
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G/G
= Pb−Free Package
*Pin 41 is the thermal pad on the bottom of the device.
ORDERING INFORMATION
Device
NCP5388MNR2G
Package
Shipping
†
QFN−40 2500 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Applications
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2011
January, 2011
−
Rev. 13
1
Publication Order Number:
NCP5388/D
NCP5388
PIN CONNECTIONS
40
39
38
37
36
35
34
33
32
G3
31
G2
VR_HOT
DGND
NTC
VR_FAN
VCC
1
2
3
4
5
6
7
8
9
10
VR_RDY
VREF
G4
EN
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
G1
DRVON
CS4
CS4N
30
29
28
27
26
25
24
23
22
21
NCP5388
CS3
CS3N
CS2
CS2N
CS1
DIFFOUT
COMP
ROSC
AGND
11
12
13
14
15
16
17
18
19
(Top View)
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2
20
VDRP
VR10/11
SS
CS1N
ILIM
VFB
VS−
VS+
NCP5388
VR10/11
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
SS
VREF
NTC
VR_FAN
+
-
DAC
+
VS−
VS+
DIFFOUT
1.3 V
VFB
COMP
VDRP
+
-
Error Amp
Droop
Amplifier
1.3 V
CS1
CS1N
CS2
CS2N
CS3
CS3N
CS4
CS4N
+
-
Gain = 6
+
−
NCP5388
VR10/11
DAC
NTC
VR_HOT
-
+
Diff Amp
Fault
-
DGND
+
-
ENB
G1
+
-
Gain = 6
+
-
ENB
G2
+
-
Gain = 6
+
-
ENB
G3
+
-
Gain = 6
+
-
4OFF
OVER
Fault
ENB
G4
Oscillator
ROSC
DAC
VS+
VS−
+
ILIM
-
Current Limit
EN
VCC
AGND
9.0 V
+
-
UVLO
Fault Logic
3 Phase
Detect
and
Monitor
Circuits
DRVON
VR_RDY
Figure 1. Simplified Block Diagram
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3
NCP5388
+12 V
VTT
680
W
PULLUPS
RVCC
12 V_FILTER
D1
BAT54HT1
C3
NCP3418B
36
U20
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
VID8
VR_EN
VR_RDY
VR_HOT
VR_FAN
2
3
4
5
6
7
8
9
10
1
37
40
39
16
15
VCC
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
VR10/VR11
EN
VR_RDY
VR_HOT
VR_FAN
VS−
VS+
VREF
NTC
DGND
AGND
14
34
38
RNTC1
C1
NTD85N02RT4
RNTC2
35
RT1
4
3
2
VCC
OD
IN
BST
DRVH
SW
DRVL
PGND
1
8
7
5
6
R2
C2
RS1
NTD60N02RT4
L1
12 V_FILTER
C4
CVCC1
30
G1
22
CS1
CS1N 21
G2
31
12 V_FILTER
12 V_FILTER
CS1
24
CS2
CS2N 23
G3
32
4
3
2
VCC
OD
IN
BST
DRVH
SW
DRVL
PGND
1
8
7
5
6
RISO1 RT2
CFB1
RFB
RISO2
NCP5388
26
CS3
CS3N 25
33
RFB1
17
19
DIFFOUT
VFB
G4
28
CS4
CS4N 27
12 V_FILTER
12 V_FILTER
29
20
RDRP
18
CF
RF
VDRP
DRVON
COMP
ILIM
13
ROSC SS
12
11
3
CSS
2
4
VCC
OD
IN
BST
DRVH
SW
DRVL
PGND
1
8
7
5
6
CH
RLIM1
RLIM2
12 V_FILTER
12 V_FILTER
4
3
2
VCC
OD
IN
BST
DRVH
SW
DRVL
PGND
1
8
7
5
6
RT2 LOCATED NEAR OUTPUT INDUCTORS
VCCP
+
VSSP
CPU GND
Figure 2. Application Schematic for Four Phases
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4
NCP5388
+12 V
VTT
680
W
PULLUPS
RVCC
12 V_FILTER
D1
BAT54HT1
C3
NCP3418B
35
RT1
VCC
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
VR10/VR11
EN
VR_RDY
VR_HOT
VR_FAN
VS−
VS+
VREF
NTC
DGND
AGND
14
34 RNTC1
38
RNTC2
4
3
2
VCC
OD
IN
BST
DRVH
SW
DRVL
PGND
1
8
7
5
6
R2
C2
CS1
RS1
NTD60N02RT4
L1
12 V_FILTER
C4
CVCC1
36
U1
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
VID8
VR_EN
VR_RDY
VR_HOT
VR_FAN
2
3
4
5
6
7
8
9
10
1
37
40
39
16
15
C1
NTD85N02RT4
30
G1
22
CS1
CS1N 21
G2
31
12 V_FILTER
12 V_FILTER
24
CS2
CS2N 23
G3
32
4
3
2
VCC
OD
IN
BST
DRVH
SW
DRVL
PGND
1
8
7
5
6
RISO1
RT2
RISO2
NCP5388
26
CS3
CS3N 25
33
CFB1
RFB
RFB1
17
19
DIFFOUT
VFB
G4
28
CS4
CS4N 27
12 V_FILTER
12 V_FILTER
29
20
RDRP
18
CF
RF
VDRP
DRVON
COMP
ILIM
13
ROSC SS
12
11
3
CSS
2
4
VCC
OD
IN
BST
DRVH
SW
DRVL
PGND
1
8
7
5
6
CH
RLIM1
RLIM2
RT2 LOCATED NEAR OUTPUT INDUCTORS
VCCP
+
VSSP
CPU GND
Figure 3. Application Schematic for Three Phases
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