NCP590
Dual Output, High Accuracy,
Ultra Low Dropout
CMOS LDO
The NCP590 is a family of very high precision dual-output CMOS
LDOs offered in a 2x2 DFN8 package. Each output is capable of
delivering up to 300 mA and is available in voltages from 0.8 V to
5 V.
The set point output voltage is accurate to within
±0.9%
with an
operating voltage input up to 5.5 V. With its ultra low dropout
characteristics and low quiescent and ground current consumption,
the NCP590 is ideal for all battery operated consumer and
microprocessor applications. The NCP590 is protected against short
circuit and thermal overload conditions.
Features
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DFN8, 2x2
MN SUFFIX
CASE 506AA
MARKING DIAGRAM
XX M
1
4
XX = Specific Device Code
M = Date Code
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Dual Outputs, Each Supporting up to 300 mA Current
Available in Output Combinations Ranging from 0.8 V to 5.0 V
2.1 V to 5.5 V V
CC
Operating Supply Range
Ultra-High Accuracy (0.9% max at 100 mA load & 25°C)
Each Output has a Dedicated Enable Control Pin
Enable Threshold Supports sub-1 V Systems
Very Low Drop Out Voltage (50 mV typ @ 100 mA load)
Low Noise (~20
mV
rms
) without Bypass Capacitor
Ultra Low Shutdown Current (0.2
mA)
Low Quiescent and Ground Current (80 - 100
mA
typ.)
Thermal Shutdown and Current Limit Protection
Active Output Discharge when Disabled
No Minimum Output Current Required for Stability
Requires C
out
of only 1.0
mF
(any ESR) for Stability
Stable with Any Type of Capacitor (including MLCC) and Zero Load
Input Under Voltage Lock Out (UVLO)
Internally Compensated Regulator for Quick Transient Response
Space-Efficient 2x2 DFN8 Package
This is a Pb-Free Device
PIN CONNECTIONS
V
in
EN1
EN2
NC
1
2
3
4
(Top View)
8
7
6
5
V
out1
V
out2
GND
NC
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Applications
Cellular Phones
Cameras
MP3/CD Players, PDA's, Camcorders
DSP Supplies
Portable Info-tronics
PCMCIA Cards
Networking Systems, DSL/Cable Modems
©
Semiconductor Components Industries, LLC, 2008
1
March, 2008 - Rev. 1
Publication Order Number:
NCP590/D
NCP590
V
in
C
in
1
mF
NCP590
OFF
OFF
ON
ON
EN1
EN2
NC
V
out2
GND
NC
C
out2
1
mF
R
Load
V
out2
V
in
V
out1
C
out1
1
mF
R
Load
V
out1
Figure 1. Typical Application
PIN FUNCTION
Pin No.
1
2
3
4, 5
6
PAD
7
8
Symbol
V
in
EN1
EN2
NC
GND
GND
V
out2
V
out1
Function
Input; Bypass directly at the IC with a 1
mF
ceramic capacitor to Ground
Enable for output regulator 1; raise above 0.95 V to enable V
out1
Enable for output regulator 2; raise above 0.95 V to enable V
out2
NC; Do not make connection to these pins
Ground
The thermal pad should be connected to ground for best thermal performance. Float if necessary
Output 2; Bypass to GND with a capacitor, 4.7
mF
≥
C
≥
0.7
mF,
any ESR
Output 1; Bypass to GND with a capacitor, 4.7
mF
≥
C
≥
0.7
mF,
any ESR
V
in
Error
Amplifier
-
+
Current Limit
Saturation Sense
Thermal Protection
Vout1
EN1
EN2
Programmable
Reference
Vout2
Error
Amplifier
-
+
Current Limit
Saturation Sense
Thermal Protection
GND
Figure 2. Block Diagram
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NCP590
ABSOLUTE MAXIMUM RATINGS
T
J
= -40°C to 125°C
Pin Symbol, Parameter
V
IN
, Input to regulator
Voltage
Current
V
IN
, Input peak Transient Voltage to regulator wrt GND
V
OUT1
, V
OUT2
,
Regulated Output
Voltage
Symbol
V
IN
I
IN
V
IN
V
OUT
-0.3
Condition
Min
-0.3
-
Max
6.0
Internally
Limited
7.0
V
IN
+ 0.3
or 6.0
(Note 1)
Internally
Limited
V
IN
+ 0.3
or 6.0
(Note 1)
125
150
2
200
0.3
V
V
V
Unit
V
Current
EN1, EN2,
Enable Input
I
OUT
V
EN
-
-0.3
Junction Temperature
Storage Temperature
ESD Capability, Human body model (Note 3)
ESD Capability, Machine model (Note 3)
V
outx
-V
in
(Note 2)
T
J
T
stg
ESD
HB
ESD
MM
V
RB
-
-50
-2
-200
-
_C
kV
V
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Which ever limit is lower
2. Exceeding this value will turn on the body diode of the PMOS driver (reference Figure 2).
THERMAL RESISTANCE
Parameter
Junction-to-Ambient
2X2 DFN
1 oz Cu
2X2 DFN
2 oz Cu
2X2 DFN
Symbol
q
JA
Condition
207.0 sq mm 1 oz Cu
54.2 sq mm 1 oz Cu
20.2 sq mm 1 oz Cu
207.0 sq mm 2 oz Cu
54.2 sq mm 2 oz Cu
20.2 sq mm 2 oz Cu
Value
158
210
375
133
184
330
36.4
60 -150 sec above 217
40 sec max at peak
265 pk
1
Unit
_C/W
Junction-to-Ambient
q
JA
_C/W
Junction-to-Board
Lead Temperature Soldering, (Note 4)
Reflow (SMD styles only), lead free
Moisture Sensitivity Level
Psi
JB
T
sld
MSL
_C/W
_C
3. This device series incorporates ESD protection and is tested by the following methods:
ESD HBM tested per AEC-Q100-002 (EIA/JESD22-A114)
ESD MM tested per AEC-Q100-003 (EIA/JESD22-A115)
4. Per IPC/JEDEC J-STD-020C
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NCP590
ELECTRICAL CHARACTERISTICS
-40°C
v
T
A
v
85°C (Note 5); V
IN
= V
OUT
+0.5 V or 2.1 V, whichever is greater (Note 6).
V
EN1,2
= 0.95 V, C
IN
= C
OUT1,2
= 1.0
mF,
unless noted otherwise
Parameter
Regulators
Input Voltage
V
IN
** which ever limit is greater
V
out(max)
+ 0.5 or
2.1 V**
0.0
-0.9
-1.9
-2.4
-
5.5
V
Symbol
Test Conditions
Min
Typ
Max
Unit
Enable Input Voltage
Voltage Accuracy
Voltage Accuracy
Overall Voltage Accuracy
V
EN
V
OUT
V
OUT
V
OUT
* which ever limit is lower
I
OUT
= 100 mA, T
A
= 25°C (Note 11)
I
OUT
= 1 mA to 200 mA
-40
_C
v
T
A
v
85_C (Notes 9, 11, 12)
I
OUT
= 1 mA to 200 mA, V
IN
= (V
OUT
+0.5 V) to 5.5 V, 2.1 V
INmin
0°C
v
T
A
v
85°C, (Notes 12, 13)
I
OUT
= 1.0 mA
V
IN
= (V
out
+ 0.5 V) to 5.5 V,
V
INmin
= 2.1 V
I
OUT
= 1 mA to 200 mA
I
OUT
= 50 mA
I
OUT
= 100 mA
I
OUT
= 150 mA
I
OUT
= 200 mA
I
OUT
= 300 mA
V
EN1
= 0.95 V, I
OUT1
= 0 mA;
V
EN2
= 0.4 V, I
OUT2
= 0 mA
OR
V
EN2
= 0.95 V, I
OUT2
= 0 mA;
V
EN1
= 0.4 V, I
OUT1
= 0 mA
One Regulator ON; One Regulator OFF
-
-
-
-
V
IN
+ 0.3
or 5.5*
+0.9
+1.9
+2.4
V
%
%
%
Line Regulation (Note 7)
DV
OUT
-
±0.05
-
%/V
Load Regulation (Note 7)
Drop-out Voltage, (Note 8)
Drop-out Voltage, (Note 8)
Drop-out Voltage, (Note 8)
Drop-out Voltage, (Note 8)
Drop-out Voltage, (Note 8)
Quiescent Current;
I
q
= I
IN
– I
OUT
DV
OUT
V
DO
V
DO
V
DO
V
DO
V
DO
I
q
-0.012
-
-
-
-
-
-
-0.005
23
52
80
110
165
80
0.012
40
85
125
170
225
125
%/mA
mV
mV
mV
mV
mV
mA
Quiescent Current;
I
q
= I
IN
– I
OUT
I
q
I
OUT1
= I
OUT2
= 0 mA
Both Regulators ON
-
115
195
mA
5. Performance guaranteed over specified operating range by design, guard banded test limits, and/or characterization. Production tested at
T
J
= T
A
= 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
6. V
OUT
based on the greater of the two outputs.
7. Overall accuracy specified over specified operating conditions of line, load, and temperature.
8. Drop out voltage V
DO
= V
IN
– V
OUT
measured when the output voltage has dropped 100 mV from the nominal value for V
OUT
> 2.0 V.
9. Guaranteed by design, not production tested.
10. Regulated and stable output over full load range down to 0 mA load.
11. V
IN
is set at V
IN
= ((V
OUT
+ 0.5 V) + 5.5 V) / 2 or V
IN
= ((2.1 V) + 5.5 V) / 2, whichever is greater.
12. Applicable for V
OUT
u
1.2 V.
13. For all output voltages and -40°C to 85°C overall voltage accuracy is 2.9%.
14. Typical disable current is in the nA.
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NCP590
ELECTRICAL CHARACTERISTICS
-40°C
v
T
A
v
85°C (Note 5); V
IN
= V
OUT
+0.5 V or 2.1 V, whichever is greater (Note 6).
V
EN1,2
= 0.95 V, C
IN
= C
OUT1,2
= 1.0
mF,
unless noted otherwise
Parameter
Regulators
Ground Current;
I
GND
= I
IN
– I
OUT
I
GND
V
EN1
= 0.95 V, I
OUT1
= 200 mA;
V
EN2
= 0.4 V, I
OUT2
= 0 mA
OR
V
EN2
= 0.95 V, I
OUT2
= 200 mA;
V
EN1
= 0.4 V, I
OUT1
= 0 mA
One Regulator ON; One Regulator OFF
I
OUT1
= I
OUT2
= 200 mA
Both Regulators ON
I
OUT1,2
= 0 mA, V
EN1,2
= 0.4 V
Both Regulators OFF
-
105
150
mA
Symbol
Test Conditions
Min
Typ
Max
Unit
Ground Current;
I
GND
= I
IN
– I
OUT
Disable Current;
I
DIS
= I
IN
– I
OUT
I
Load
Load Current (Note 10)
Maximum Output Current
Current Limit, per Regulator (Note 9)
Output Noise Voltage (Note 9)
I
GND
I
DIS
I
OUT
I
OUT
I
SC
e
n
-
0
0
300
175
(Note
14)
-
-
750
20
30
155
15
1.9
0.1
60
55
50
40
250
1
-
-
-
-
-
-
-
2.1
-
-
-
-
mA
mA
mA
mA
mA
mV
RMS
V
OUT
= 0 V
BW = 10 Hz to 100 kHz
V
OUT
= 0.8 V
V
OUT
= 2.8 V
-
-
-
-
-
-
-
Thermal Shutdown (Note 9)
T
jSD
UVLO
UVLO
hys
PSRR
Junction Temperature
Hysteresis
_C
V
V
dB
Input under voltage lock out
UVLO hysteresis
Power Supply Rejection Ratio
(Note 9)
I
OUT
= 200 mA
120 Hz 0.8 V output
120 Hz 1.8 V output
120 Hz 2.8 V output
I
OUT
= 200 mA
1 KHz 2.8 V output
-
-
-
-
Power Supply Rejection Ratio
(Note 9)
Enable Control Characteristics
Maximum Input Current at EN Input
PSRR
dB
-
I
EN
V
EN
= 0.0 V
V
EN
= V
IN
-
-
-
0.95
0.01
0.01
-
-
-
-
0.4
-
mA
Low Input Threshold
High Input Threshold
Timing Characteristics
Turn On Time Delay, Both outputs
turned on with ENABLE
Turn Off Time Delay, Both outputs
turned off with ENABLE (Note 9)
V
IL
V
IH
To 95%
DV
O
V
IN(MIN)
to 5.5 V
V
IN
= 5.5 V
V
OUT
= 5 V, to V
OUT
= 250 mV
V
OUT
= 0.8 V, to V
OUT
= 40 mV
V
V
T
ON
T
OFF
-
375
700
ms
-
-
215
155
-
-
ms
ms
Recommended Output Capacitor Specifications
Output Capacitance (Note 9)
C
OUT
Capacitance over full temperature
range of application. Any ESR
0.7
1.0
4.7
mF
5. Performance guaranteed over specified operating range by design, guard banded test limits, and/or characterization. Production tested at
T
J
= T
A
= 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
6. V
OUT
based on the greater of the two outputs.
7. Overall accuracy specified over specified operating conditions of line, load, and temperature.
8. Drop out voltage V
DO
= V
IN
– V
OUT
measured when the output voltage has dropped 100 mV from the nominal value for V
OUT
> 2.0 V.
9. Guaranteed by design, not production tested.
10. Regulated and stable output over full load range down to 0 mA load.
11. V
IN
is set at V
IN
= ((V
OUT
+ 0.5 V) + 5.5 V) / 2 or V
IN
= ((2.1 V) + 5.5 V) / 2, whichever is greater.
12. Applicable for V
OUT
u
1.2 V.
13. For all output voltages and -40°C to 85°C overall voltage accuracy is 2.9%.
14. Typical disable current is in the nA.
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