NCV8537
500 mA High Accuracy Low
Dropout Linear Regulator,
with Power Good Function
The NCV8537 is a high performance low dropout linear voltage
regulator. Based on the popular NCV8535, the device retains all the
best features of its predecessor which includes high accuracy,
excellent stability, low noise performance and reverse bias protection
but now includes a Power Good output signal to enable monitoring of
the supply system. The device is available with fixed or adjustable
outputs and is packaged in a 10 pin 3x3 mm DFN package.
Features
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DFN10
CASE 485C
DFNW10
CASE 507AM
•
High Accuracy Output Over Line and Load Variances (±0.9% at
•
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•
•
•
•
•
•
•
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25°C)
Operating Temperature Range: −40°C to 125°C
Power Good Output to Indicate the Regulator is Within Specified
Limits
Stable Output with Low Value Capacitors of any type and with no
Minimum Load Current Requirement
Incorporates Current Limiting and Reverse Bias Protection
Thermal Shutdown Protection
Low Dropout Voltage at Full Load (340 mV typ at V
o
= 3.3 V)
Low Noise (33
mVrms
w/ 10 nF C
nr
and 52
mVrms
w/out C
nr
)
Low Shutdown Current (< 1 mA)
Reverse Bias Protected
2.9 V to 12 V Supply Range
Available in 1.8 V, 2.5 V, 3.3 V, 5.0 V and Adjustable Output
Voltages
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
PIN CONFIGURATION
Pin 1, 2. V
out
3. Sense / ADJ
4. GND
5. PWRG
6. NC
7. NR
8. SD
9, 10. V
in
EP, GND
MARKING DIAGRAM
1
V8537
xxx
ALYWG
G
1
L8537
xxx
ALYWG
G
Applications
Networking Systems, DSL/Cable Modems
Audio Systems for Automotive Applications
Navigation Systems
Satellite Receivers
V8537= Specific Device Code
L8537 = Specific Device Code
xxx = ADJ, 180, 250, 330, 500
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 15 of this data sheet.
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
©
Semiconductor Components Industries, LLC, 2017
1
May, 2018 − Rev. 5
Publication Order Number:
NCV8537/D
NCV8537
ON
OFF
8
6
NC
SD
9
10
IN
+
R1 PWRG EP
100k 5
EP
IN
7
NR
C
nr
(Optional)
SENSE
OUT
3
2
V
in
C
in
1.0
mF
OUT
1
GND
4
C
out
1.0
mF
+
V
out
PWRG
Figure 1. Typical Fixed Version Application Schematic
ON
OFF
8
6
NC
SD
9
10
IN
+
R1 PWRG EP
100k 5
EP
IN
7
NR
C
nr
(Optional)
3
2
1
OUT
GND
4
C
out
1.0
mF
R2
ADJ
OUT
R3
V
out
+
V
in
C
in
1.0
mF
PWRG
Figure 2. Typical Adjustable Version Application Schematic
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2
NCV8537
Comp.
PWRG
Vin
SD
Enable
Block
Voltage
Reference
Current and
Thermal
Protection
Circuit
Series Pass
Element with
Reverse Bias
Protection
NR
Error
Amplifier
Vout
NCV8537 Adjustable
ADJ
GND
Figure 3. Block Diagram, Adjustable Output Version
Comp.
PWRG
Vin
SD
Enable
Block
Voltage
Reference
Current and
Thermal
Protection
Circuit
Series Pass
Element with
Reverse Bias
Protection
NR
Error
Amplifier
Vout
SENSE
NCV8537 Fix
GND
Figure 4. Block Diagram, Fixed Output Version
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3
NCV8537
PIN FUNCTION DESCRIPTION
Pin No.
1, 2
3
4
5
6
7
8
9, 10
EPAD
Pin Name
V
out
SENSE/ADJ
GND
PWRG
NC
NR
SD
V
in
EPAD
Description
Regulated output voltage. Bypass to ground with C
out
w
1.0
mF
For output voltage sensing, connect to Pins 1 and 2.at Fixed output Voltage version
Adjustable pin at Adjustable output version
Power Supply Ground
Power Good
Not Connected
Noise Reduction Pin. This is an optional pin used to further reduce noise.
Shutdown pin. When not in use, this pin should be connected to the input pin.
Power Supply Input Voltage
Exposed thermal pad should be connected to ground.
MAXIMUM RATINGS
Rating
Input Voltage
Output Voltage
PWRG Pin Voltage
Shutdown Pin Voltage
Junction Temperature Range
Storage Temperature Range
Symbol
V
in
V
out
V
PWRG
V
sh
T
J
T
stg
Value
−0.3 to +16
−0.3 to V
in
+0.3 or 10 V*
−0.3 to +16
−0.3 to +16
−40 to +150
−50 to +150
Unit
V
V
V
V
°C
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
NOTE: This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) tested per AEC−Q100−002 (EIA/JESD22−A114)
Machine Model (MM) tested per AEC−Q100−003 (EIA/JESD22−A115)
Charged Device Model (CDM) tested per EIA/JESD22−C101.
*Which ever is less. Reverse bias protection feature valid only if (V
out
− V
in
)
≤
7 V.
THERMAL CHARACTERISTICS
Test Conditions (Typical Value)
Characteristic
Junction−to−Air,
qJA
Junction−to−Pin, J−L4
Min Pad Board
(Note 1)
215
58
1, Pad Board
(Note 1)
66
18
Unit
°C/W
°C/W
1. As mounted on a 35 x 35 x 1.5 mm FR4 Substrate, with a single layer of a specified copper area of 2 oz (0.07 mm thick) copper traces and
heat spreading area. JEDEC 51 specifications for a low and high conductivity test board recommend a 2 oz copper thickness. Test conditions
are under natural convection or zero air flow.
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4
NCV8537
ELECTRICAL CHARACTERISTICS − 1.8 V
(V
out
= 1.8 V typical, V
in
= 2.9 V, T
A
= −40°C to +125°C, unless otherwise noted, Note 2)
Characteristic
Output Voltage (Accuracy)
V
in
= 2.9 V to 5.8 V, I
load
= 0.1 mA to 500 mA, T
A
= 25°C
Output Voltage (Accuracy)
V
in
= 2.9 V to 5.8 V, I
load
= 0.1 mA to 500 mA, T
A
= 0°C to +85°C
Output Voltage (Accuracy)
V
in
= 2.9 V to 5.8 V, I
load
= 0.1 mA to 500 mA, T
A
= −40°C to +125°C
Minimum Input Voltage
Line Regulation
V
in
= 2.9 V to 12 V, I
load
= 0.1 mA
Load Regulation
V
in
= 2.9 V, I
load
= 0.1 mA to 500 mA
Dropout Voltage (See Figure 9)
I
load
= 500 mA (Notes 3, 4)
I
load
= 300 mA (Notes 3, 4)
I
load
= 50 mA (Notes 3, 4)
Peak Output Current (See Figures 14 and 17)
Short Output Current (See Figure 14) V
in
< 7 V, T
A
= 25°C
Thermal Shutdown / Hysteresis
Ground Current
In Regulation
I
load
= 500 mA (Note 3)
I
load
= 300 mA (Note 3)
I
load
= 50 mA
I
load
= 0.1 mA
In Dropout
V
in
= 2.2 V, I
load
= 0.1 mA
In Shutdown
V
SD
= 0 V
Output Noise
C
nr
= 0 nF, I
load
= 500 mA, f = 10 Hz to 100 kHz, C
out
= 10
mF
C
nr
= 10 nF, I
load
= 500 mA, f = 10 Hz to 100 kHz, C
out
= 10
mF
Power Good Voltage
Low Threshold
Hysteresis
High Threshold
Power Good Pin Voltage Saturation (I
ef
− 1.0 mA)
Power Good Pin Leakage
Power Good Blanking Time (Note 7)
Shutdown
Threshold Voltage ON
Threshold Voltage OFF
SD Input Current, V
SD
= 0 V to 0.4 V or V
SD
= 2.0 V to V
in
Output Current In Shutdown Mode, V
out
= 0 V
Reverse Bias Protection, Current Flowing from the Output Pin to GND
(V
in
= 0 V, V
out_forced
= 1.8 V)
I
GNDsh
V
noise
52
33
V
elft
93
95
2
97
200
1.0
50
2.0
0.4
I
SD
I
OSD
I
OUTR
0.07
0.07
10
1.0
1.0
99
mV
mA
ms
V
V
mA
mA
mA
Symbol
V
out
V
out
V
out
V
inmin
Line
Reg
Load
Reg
V
DO
620
230
95
I
pk
I
sc
T
J
I
GND
9.0
4.6
0.8
−
14
7.5
2.5
220
500
1.0
mA
mA
mA
mA
mVrms
mVrms
% of
V
out
160/10
500
700
830
900
mA
mA
°C
Min
−0.9%
1.783
−1.4%
1.774
−1.5%
1.773
Typ
1.8
1.8
1.8
2.9
0.04
0.04
Max
+0.9%
1.817
+1.4%
1.826
+1.5%
1.827
Unit
V
V
V
V
mV/V
mV/mA
mV
V
efdo
I
efleak
t
ef
V
SD
2. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at T
J
= T
A
= 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
3. T
A
must be greater than 0°C.
4. Maximum dropout voltage is limited by minimum input voltage V
in
= 2.9 V recommended for guaranteed operation.
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