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NJM567M-T1

Phase Locked Loops - PLL

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厂商名称:New JRC

厂商官网:https://www.njr.com

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器件参数
参数名称
属性值
产品种类
Product Category
Phase Locked Loops - PLL
制造商
Manufacturer
New JRC
RoHS
No
类型
Type
Tone Decoder
电源电压-最大
Supply Voltage - Max
9 V
电源电压-最小
Supply Voltage - Min
4.75 V
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 85 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
DMP-8
工作电源电流
Operating Supply Current
12 mA
工作电源电压
Operating Supply Voltage
5 V
文档预览
NJM567
TONE DECODER / PHASE LOCKED LOOP
GENERAL DESCRIPTION
The
NJM567
tone and frequency decoder is a highly stable phase
locked loop with synchronous AM lock detection and power output
circuitry. Its primary function is to drive a load whenever a sustained
frequency within its detection band is present at the self-biased input.
The bandwidth cebter frequency, and output delay are independently
determined by means of four external components.
FEATURES
Operating Voltage
(4.75V to 9.0V)
Wide frequency range
(0.01Hz to 500kHz)
High stability of center frequency
Independently controllable bandwidth
(up to 14 percent)
High out-band signal and noise rejection
Logic-compatible output with 100mA current sinking capability
Frequency adjustment over a 20 to 1 range with an external resistor
Package Outline
DIP8, DMP8
Bipolar Technology
PIN CONFIGURATION
PIN FUNCTION
1 OUTPUT FILTER
2 LOW-PASS FILTER
3 INPUT
4 V
+
5 TIMING R
6 TIMING CR
7 GROUND
8 OUTPUT
PACKAGE OUTLINE
NJM567D
NJM567M
NJM567D
NJM567M
BLOCK DIAGRAM
Ver.2003-12-09
-1-
NJM567
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Supply Voltage
Input Positive Voltage
Input Negative Voltage
Output Voltage
Power Dissipation
Operating Temperature Range
Storage Temperature Range
SYMBOL
V
+
(T
a
=25°C)
RATINGS
10
V +0.5
-10
15 (Pin8)
(DIP8)
(DMP8)
500
300
+
UNIT
V
V
Vdc
Vdc
mW
mW
°C
°C
V
IP
V
IN
V
8
P
D
T
opr
T
stg
-40 to +85
-40 to +125
ELECTRICAL CHARACTERISTICS
PARAMETER
Highest Center Frequency
Center Frequency Stability
Center Frequency Shift with Supply Voltage
Largest Detection Bandwidth
Largest Detection Bandwidth Skew
Largest Detection Bandwidth Variation with Temperature
Largest Detection Bandwidth Variation with Supply Voltage
Input Resistance
Smallest Detectable Input Voltage
Largest No-Output Input Voltage
Greatest Simultaneous Outband Signal to Inband Signal Ratio
Minimum Input Signal to Wideband Noise Ratio
Fastest ON-OFF Cycling Rate
"1" Output Leakage Current
"0" Output Voltage
Output Fall Time
Output Rise Time
Operating Voltage
Operating Current Quiescent
Operating Current - Activated
Quiescent Power Dissipation
SYMBOL
f
OH
∆f
O
/
∆T
∆f
O
/
∆V
B
WM
B
WS
∆B
W
/
∆T
∆B
W
/
∆V
R
IN
TEST CONDITION
-20 to +75°C
f
O
=100kHz
f
O
=100kHz
Vi=300mVrms
Vi=300mVrms
I
L
=100mA, fi=f
O
I
L
=100mA, fi=f
O
B
n
=140kHz
MIN.
100
-
-
10
-
-
-
-
-
10
-
-
-
-
-
-
-
-
4.75
-
-
-
TYP.
500
35±60
0.7
14
2
±0.1
±2
20
20
15
+6
-6
f
O
/ 20
0.01
0.2
0.6
30
150
-
7
12
35
(T
a
=25°C, V
+
=5.0V)
MAX.
-
-
2
18
3
-
-
-
25
-
-
-
-
25
0.4
1.0
-
-
9.0
10
15
-
UNIT
kHz
PPM / °C
%/V
%×f
O
%×f
O
% / °C
%/V
kΩ
mVrms
mVrms
dB
dB
µA
V
V
ns
ns
V
mA
mA
mW
I
L
=30mA
I
L
=100mA
R
L
=50Ω
R
L
=50Ω
V
opr
I
CC
I
CC
P
D
R
L
=20kΩ
+
-2-
Ver.2003-12-09
NJM567
TYPICAL CHARACTERISTICS
Frequency Drift
Frequency Drift
Ambient Temperature Ta (
°
C)
Frequency Drift
Center Frequency Temperature
Coefficient
(
T
=
0
°
C
~
70
°
C)
Center Frequency Shift
Detection Bandwidth
Ver.2003-12-09
-3-
NJM567
TYPICAL CHARACTERISTICS
Bandwidth
Largest Detection Bandwidth
Detection Bandwidth vs. C
2
, C
3
Operating Current
Greatest Number of Cycles
Output Voltage
-4-
Ver.2003-12-09
NJM567
DESIGN FORMULAS
f
O
=
1
( V
IN
=
0mV )
1.07R
1
C
1
V
IN
in % of f
O
, V
IN
200mVrms
f
O
C
2
BW ~ 1070
where
V
IN
: Input Voltage (Vrms)
C
2
: LPF Capacitor (µF)
PLL WORDS EXPLANATIONS
Center Frequency (f
O
)
The free-running frequency of the current controlled oscillator (CCO) in the absence of an input signal.
Detection Bandwidth (BW)
The frequency range, centered about f
O
, within which an input signal above the threshold voltage (typically 20mVrms)
will cause a logical zero state on the output. The detection bandwidth corresponds to the loop capture range.
Lock Range
The largest frequency range within which an input signal above the threshold voltage will hold a logical zero state on
the output.
Detection Band Skew
A measure of how well the detection band is centered about the center frequency, f
O
. The skew is defined as (f
max
+ f
min
- 2f
O
)/ 2f
O
where f
max
and f
min
are the frequencies corresponding to the edges of the detection band. The skew can be
reduced to zero if necessary by means of an optional centering adjustment.
Operating Instructions
Figure 1 shows a typical connection diagram for the 567. For most applications, the following three-step procedure will
be sufficient for choosing the external components R
1
, C
1
C
2
and C
3
.
Figure 1
1. Select R
1
and C
1
for the desired center frequency. For best temperature stability, R
1
should be between 2K and 20K
ohm, and the combined temperature coefficient of the R
1
C
1
product should have sufficient stability over the projected
temperature range to meet the necessary requirements.
2. Select the low pass capacitor, C
2
, by referring to the Bandwidth versus Input Signal Amplitude graph. If the input
amplitude variation is known, the appropriate value of f
O
C
2
necessary to give the desired bandwidth may be found.
Conversely, an area of operation may be selected on this graph and the input level and C
2
may be adjusted accordingly.
For example, constant bandwidth operation requires that input amplitude be above 200mVrms. The bandwidth, as noted
on the graph, is then controlled solely by the f
O
C
2
product (f
O
(Hz), C
2
(µfd)).
3. The value of C
3
is generally non-critical. C
3
sets the band edge of a low pass filter which attenuates frequencies outside
the detection band to eliminate spurious outputs. If C
3
is too small, frequencies just outside the detection band will switch the
output stage on and off at the beat frequency, or the output may pulse on and off during the turn-on transient. If C
3
is too
large, turn-on and turn-off of the output stage will be delayed until the voltage on C
3
passes the threshold voltage. (Such
delay may be desirable to avoid spurious outputs due to transient frequencies.) A typical minimum value for C
3
is 2C
2
.
Ver.2003-12-09
-5-
查看更多>
参数对比
与NJM567M-T1相近的元器件有:NJM567M-TE1、NJM567M-T2。描述及对比如下:
型号 NJM567M-T1 NJM567M-TE1 NJM567M-T2
描述 Phase Locked Loops - PLL Phase Locked Loops - PLL Tone Decoder/Phase Locked Loop DMP-8 Phase Locked Loops - PLL
产品种类
Product Category
Phase Locked Loops - PLL Phase Locked Loops - PLL Phase Locked Loops - PLL
制造商
Manufacturer
New JRC New JRC New JRC
RoHS No Details N
类型
Type
Tone Decoder Tone Decoder Tone Decoder
电源电压-最大
Supply Voltage - Max
9 V 9 V 9 V
电源电压-最小
Supply Voltage - Min
4.75 V 4.75 V 4.75 V
最小工作温度
Minimum Operating Temperature
- 40 C - 40 C - 40 C
最大工作温度
Maximum Operating Temperature
+ 85 C + 85 C + 85 C
安装风格
Mounting Style
SMD/SMT SMD/SMT SMD/SMT
封装 / 箱体
Package / Case
DMP-8 DMP-8 DMP-8
工作电源电流
Operating Supply Current
12 mA 12 mA 12 mA
工作电源电压
Operating Supply Voltage
5 V 5 V 5 V
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