NJM78LR05
SERIES REGULATOR WITH RESET FUNCTION
■
GENERAL DESCRIPTION
The
NJM78LR05
is a series regulator with reset
function.
In case of shut down or output voltage drop, the IC
generates reset signal to a microcomputer.
That is suitable for items with microcomputer, such
as TV sets, remote controller, refrigerator and others.
■
PACKAGE OUTLINE
NJM78LR05BD / CD / DD NJM78LR05BM / CM / DM
■
FEATURES
●
Output Current
I
O
=150mA max.
●
Reset Function Including
●
Reset Delay Time can be Adjusted
NJM78LR05BL / CL / DL
by an External Capacitance.
●
Internal Over Current Protection
●
Thermal Shut Down
●
Bipolar Technology
●
package Outline
DIP8, DMP8, SIP8, SOT-89 (5Pin)
NJM78LR05BU / CU / DU
■
RESET THRESHOLD VOLTAGE LINE-UP
Reset Threshold Voltage
4.0V
4.2V
4.3V
“X” is package suffix.
Version
D
C
B
Part Number
NJM78LR05DX
NJM78LR05CX
NJM78LR05BX
■
BLOCK DIAGRAM
Ver.2009-05-18
-1-
NJM78LR05
■
PIN CONFIGURATION
PIN FUNCTION
1. INPUT
2. NC
3. Cd
4. NC
5. GND
6. RESET-OUTPUT
7. NC
8. OUTPUT
NJM78LR05BL / CL / DL
NJM78LR05BD / CD / DD
NJM78LR05BM / CM / DM
NJM78LR05BU / CU / DU
PIN FUNCTION
1. Cd
2. GND
3. RESET-OUTPUT
4. OUTPUT
5. INPUT
■
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Input Voltage
Power Dissipation
Operating Temperature Range
Storage Temperature Range
*At on PC board.
SYMBOL
V
IN
P
D
T
opr
T
stg
MAXIMUM RATINGS
+20
(DIP-8)
(DMP8)
(SIP8)
(SOT-89)
500
500*
800
350
(T
a
=25°C)
UNIT
V
mW
°C
°C
-40 to +85
-50 to +150
■
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Input Voltage
Output Current
SYMBOL
V
IN
I
O
CONDITIONS
7.5 to 18
1 to 100
(T
a
=25°C)
UNIT
V
mA
-2-
Ver.2009-05-18
NJM78LR05
■
ELECTRICAL CHARACTERISTICS
[Power Supply Block]
PARAMETER
Output Voltage
Quiescent Current
Output Short Current
Line Regulation 1
Line Regulation 2
Load Regulation 1
Load Regulation 2
Ripple Rejection
Output Noise Voltage
Dropout Voltage
[Reset Block]
(H) Reset Output Voltage
(L) Reset Output Voltage
Reset Threshold Voltage
V
ORH
V
ORL
V
RT
V
IN
=3V, I
O
=1mA
B Version
C Version
D Version
Reset Threshold Hysteresis Voltage
Reset Output Delay Time
V
RTH
td
Cd=0.1µF
4.80
-
4.12
4.03
3.84
50
7.50
5.00
10
4.30
4.20
4.00
100
10.0
5.20
200
4.48
4.37
4.16
200
12.5
mV
ms
V
mV
V
SYMBOL
V
O
I
Q
I
OSC
∆V
O
/ V
IN
1
∆V
O
/ V
IN
2
∆V
O
/ I
O
1
∆V
O
/ I
O
2
RR
V
NO
∆V
I-O
I
O
=1mA
I
O
=100mA
OUTPUT-GND short
7V
≤
V
IN
≤
18V
8V
≤
V
IN
≤
18V
I
O
=1 to 100mA
I
O
=1 to 40mA
f=120Hz, e
in
=1V
P-P
, V
IN
=8 to 18V
10Hz
≤
f
≤
100kHz, I
O
=1mA
CONDITIONS
MIN.
4.80
-
150
-
-
-
-
-
-
-
TYP.
5.00
1.40
300
6.0
3.0
9.0
3.0
79
80
1.5
MAX.
5.20
3.40
450
65.0
42.0
60.0
30.0
-
-
2.2
UNIT
V
mA
mA
mV
mV
mV
mV
dB
µV
V
(V
IN
=10V, I
O
=40mA, C
IN
=1µF, C
O
=10µF, T
a
=25°C)
Ver.2009-05-18
-3-
NJM78LR05
■
APPLICATION CIRCUIT
td [ms] = 100×Cd [µF]
Note 1 : When the capacitance Cd is too large, the actual delay time is shorter than the calculated result because an
electrical charge of Cd is discharged incompletely.
Solution of above problem :
(1) Connect SBD between output terminal and Cd terminal. Please refer to the fallowing circuit.
(2) Select larger capacitance, C
IN
than Cd.
-4-
Ver.2009-05-18
NJM78LR05
■
TIMING CHART
1
○
When the input voltage is up to about 0.8V, some voltage is outputted at the reset output because the
NJM78LR05
operation is unstable.
2
○
When the input voltage goes over about 0.8V, the reset output becomes “L”.
3
○
The output voltage is rising up with the input voltage.
4
○
When the output voltage goes over (V
RT
+V
RTH
), the delay circuit of reset output activates.
V
RT
: Reset Threshold Voltage
V
RTH
: Reset Threshold Hysterisis Voltage
5
○
After the reset output delay time td has passed, the reset output becomes “H”.
6
○
The output voltage is falling down with the input voltage.
7
○
When the output voltage is less than V
RT
, the reset output becomes “L”.
Ver.2009-05-18
-5-
FPGA/CPLD
