NJU9101
Low Power Analog Front End
■FEATURES
●Supply
Voltage
●Low
Current Consumption
+2.4 to +3.6V
4µA (OPA,OPB),
150µA (ADC)
●Low
Noise Amplifier
1.3µVpp typ. (0.1 to 10Hz)
●Low
Offset Voltage Amplifier 300µV max.
●RF
immunity Amplifier
●Programmable
Cell Bias Voltage
OPA:
0.3V to 1.7V (7 steps)
OPB:
0.25V to 1.75V (50mV step)
●Programmable
Gain Pre-Amplifier 1V/V to 8V/V
●High
resolution Programmable Gain ADC
1V/V to 8V/V, 16-Bit (NFB), 32sps to 2k sps
●System
Calibration for offset & gain drift
●Control
external EEPROM as a Master device
●Ambient
Operating Temperature -40°C to +85°C
2
●Interface
I C (3-Bit selectable slave address)
●Package
EQFN-24-LE (4mm x 4mm)
■GENERAL
DESCRIPTION
NJU9101 is a Low Power Analog Front End IC for use
in micro-power sensing applications,
especially electrochemical sensors. It provides a
complete signal processing solution between sensor
and micro-processor as smart-sensor module.
NJU9101 has 2 channel low power operational
amplifiers. These amplifiers provide potentiostat and
trans-impedance-amplifiers to constitute gas sensor
systems. The NJU9101 has calibration circuit by using
output data of built-in high precision ADC. It is suitable
for temperature variation of sensor.
NJU9101 operates over voltage range of 2.4V to 3.6V.
Total average current consumption can be less than
5µA.
■APPLICATION
●Gas
Monitor
●Blood
Glucose Meter
●Current
Sensing Systems
●Low
Power Systems
●Photodiode
Sensing Systems
●Portable
equipment
■INL
vs Input Voltage (ADC)
■EQUIVALENT
CIRCUIT・BLOCK DIAGRAM
Ver.1
http://www.njr.com/
-1-
NJU9101
■PIN
CONFIGURATION
EQFN-24-LE
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PAD
SYMBOL
SCL
2
2
DESCRIPTION
I C serial clock input
I C serial data input / output
(which requires an pull-up resistor)
I C serial clock output for external EEPROM
(which requires an pull-up register)
I C serial data input / output for external EEPROM
(which requires an pull-up resister)
Chip address selection input 0
Chip address selection input 1
Chip address selection input 2
Select 7 chip address from
“000”
to
“110”.
Do not select address
“111”,
which address is for production test
purpose
2
2
Pin Type
Digital Input
Digital Input / Output
Digital Output
Digital Input / Output
Digital Input
Digital Input
Digital Input
Analog Input
Power Supply
Analog Input
Analog Input
Analog Output
Analog Input
Analog Input
Swtich
Swtich
Analog Input
Analog Input
Analog Output
Analog Input
Analog Input
Analog Input
GND
Digital Input / Output
GND
SDA
EXSCL
EXSDA
AD0
AD1
AD2
TEST
VDD
VREFA+
VREFIN
BOUT
BIN-
BIN+
SWS
SWD
AIN+
AIN-
AOUT
AUXIN-
AUXIN+
VREFA-
GND
RDYB
EXPPAD
TEST terminal (This terminal is used for production test. Connect to VDD)
Voltage Supply
Positive voltage reference input for ADC
Voltage reference input for Bias Registor
Voltage output for Bch. OpAmp
Negative voltage input for Bch. OpAmp
Positive voltage input for Bch. OpAmp
Switch Source Input 1
Switch Drain Input 2
Positive voltage input for Ach. OpAmp
Negative voltage input for Ach. OpAmp
Voltage output for Ach. OpAmp
Auxiliary positive input
Auxiliary negative input
Negative voltage reference input for ADC
(connect to GND, is recommended)
GND
RDYB output / GPIO
Exposed PAD on backside (connect to GND)
Ver.1
http://www.njr.com/
-2-
NJU9101
■MARK
INFORMATION
NJU9101 MLE (TE1)
Part Number
Package
Taping Form
■ORDERING
INFORMATION
PACKAGE
PART NUMBER
OUTLINE
NJU9101MLE
EQFN-24-LE
RoHS
O
HALOGEN- TERMINAL
FREE
FINISH
O
Sn-2Bi
MARKING
9101
WEIGHT
(mg)
31
MOQ(pcs)
1,000
■ABSOLUTE
MAXIMUM RATINGS
PARAMETER
Power Supply Voltage
Analog Input Voltage
Switch Input Voltage
(1)
SYMBOL
V
DD
V
IA
V
ID
V
IS
I
SO
(2)
RATINGS
5
-0.3 to V
DD
+0.3 not exceeding 5
-0.3 to 6
-0.3 to V
DD
+0.3 not exceeding 5
-40 to +40
(4)
(5)
830 / 2100
（2-layer
/ 4-layer)
-40 to +85
-40 to +150
(3)
UNIT
V
V
V
V
mA
mW
°C
°C
Digital Input Voltage
(1)
On State Switch Current
Power Dissipation(T
a
=25°C)
P
D
T
opr
T
stg
Operating Temperature Range
Storage Temperature Range
(1): The input pins have clamp diodes to the power supply pins. Limit the input current to 10mA or less whenever input signals
exceed the power supply rail by 0.3V.
(2): Power dissipation is the power that can be consumed by the IC at T
a
=25°C, and is the typical measured value based on
JEDEC condition. When using the IC over T
a
=25°C subtract the value [mW/°C] = P
D
/ T
st
max.- 25) per temperature.
(3): Mounted on glass epoxy board.
(101.5×114.5×1.6mm: based on EIA/JEDEC standard, 2Layers FR-4, with Exposed Pad)
(4): Mounted on glass epoxy board.
(101.5×114.5×1.6mm: based on EIA/JEDEC standard, 4Layers FR-4, with Exposed Pad)
(For 4Layers: Applying 99.5×99.5mm inner Cu area and a thermal via hole to a board based on JEDEC standard
JESD51-5)
■RECOMMENDED
OPERATING CONDITIONS
PARAMETER
Power Supply Voltage
Operating Temperature Range
Storage Temperature Range
SYMBOL
V
DD
T
opr
T
stg
RATINGS
+2.4 to +3.6
-40 to +85
-40 to +150
UNIT
V
°C
°C
Ver.1
http://www.njr.com/
-3-
NJU9101
■ELECTRICAL
CHARACTERISTICS
Unless otherwise specified, all limits ensured for T
a
= 25°C, V
DD
= V
REFIN
= V
REFA+
= 3V
PARAMETER
OPA, OPB
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Open Loop Gain
Common Mode Rejection Ratio
Common Mode Input Voltage Range
Maximum Output Voltage
Gain Band Width
Slew Rate
Equivalent Input Noise Voltage
V
IO
∆V
IO
/
∆T
I
B
A
V
CMR
V
ICM
V
OH
V
OL
GBW
SR
e
n
f = 100Hz, R
S
= 50Ω
f = 0.1Hz to 10Hz
V
ICM
= GND to 2V
CMR
≥
65dB
I
SOUECE
= 1mA
I
SINK
= 1mA
V
ICM
= V
DD
/2, R
s
= 50Ω
-
-
-
-
65
GND
2.8
-
-
-
-
-
-
±1
10
100
80
-
2.85
0.15
30
0.01
50
1.3
±300
-
-
-
-
2
-
0.2
-
-
-
-
µV
µV/°C
pA
dB
dB
V
V
V
kHz
V/µs
nV/√Hz
µV
pp
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
Unless otherwise specified, all limits ensured for T
a
= 25°C, V
DD
= V
REFIN
= V
REFA+
= 3V, ADC reference Voltage = External
PARAMETER
OPA, OPB with BIASRES (Potentiostat)
OPA referred to OPB Input Offset
Voltage 1
OPA referred to OPB Input Offset
Drift 1
OPA referred to OPB Input Offset
Voltage 2
OPA referred to OPB Input Offset
Drift 2
OPA referred to OPB Input Offset
Voltage 3
OPA referred to OPB Input Offset
Drift 3
V
IO1A-B
∆V
IO1A-B
/
∆T
V
IO2A-B
∆V
IO2A-B
/
∆T
V
IO3A-B
∆V
IO3A-B
/
∆T
OPA BIAS = 1V
OPB BIAS = 1V
OPA BIAS = 1V
OPB BIAS = 1V
OPA BIAS = 1V
OPB BIAS = 0.7V
OPA BIAS = 1V
OPB BIAS = 0.7V
OPA BIAS = 1V
OPB BIAS = 1.6V
OPA BIAS = 1V
OPB BIAS = 1.6V
-
-
295
-
-605
-
-
±2
300
±5
-600
±8
±0.6
-
305
-
-595
-
mV
µV/°C
mV
µV/°C
mV
µV/°C
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
Unless otherwise specified, all limits ensured for T
a
= 25°C, V
DD
= V
REFIN
= V
REFA+
= 3V
PARAMETER
Analog Switch (ANASW)
On State Resistance
R
ON
Analog Switch = ON
I
DS
= -10mA
Analog Switch = OFF
V
SWS
=2V/1V,
V
SWD
=1V/2V
-
10
30
Ω
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
Off Leakage Current
I
LOFFD
±1
-
nA
Ver.1
http://www.njr.com/
-4-
NJU9101
Unless otherwise specified, all limits ensured for T
a
= 25°C, V
DD
= V
REFIN
= V
REFA+
= 3V, Temperature Input Mode
PARAMETER
Temperature Sensor
Temperature Accuracy (Error) 1
Temperature Accuracy (Error) 2
Temperature Resolution
T
ACC1
T
ACC2
T
RES
T
a
= 25°C
T
a
= -40°C to +85°C
-
-
-
±1
±3
0.25
±5
-
-
°C
°C
°C
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
Unless otherwise specified, all limits ensured for T
a
= 25°C, V
DD
= 3V
PARAMETER
Internal Reference
Internal Reference Voltage
Internal Reference Drift
V
IREF
∆V
IREF
/
∆T
±1%
T
a
= -40°C to +85°C
2.028
-
2.048
30
2.068
-
V
ppm/°C
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
Unless otherwise specified, all limits ensured for T
a
= 25°C, V
DD
= V
REFIN
= V
REFA+
= 3V, Auxiliary Differential Input Mode
PARAMETER
PREAMP
PREAMP Gain Error
G
ACCP
PREAMP Gain =
1V/1V to 8V/V
PREAMP Gain = 1V/V
AUXIN+ = AUXIN- =
GND+0.05 to V
DD
-1
PREAMP Gain = 1V/V
CMR
PRE
≥
70dB
-
±0.1
-
%
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
PREAMP Common Mode Rejection
PREAMP Common Mode
Input Voltage
CMR
PRE
70
GND
+0.05
90
-
dB
V
ICMP
-
V
CC
-1
V
Unless otherwise specified, all limits ensured for T
a
= 25°C, V
DD
= V
REFIN
= V
REFA+
= 3V, Auxiliary Input Mode
ADC Chopping = ON, ADC Reference Voltage = External, ADC Gain = 1V/V, ADC Decimation Ratio =
“320”
PARAMETER
ADC
Resolution
Noise Free Bit
Conversion Time
Output Noise
Integral Non Linearity
Gain Error
Offset Error
Differential Input Voltage Range
ADC Common Mode Rejection
ADC Common Mode Input Voltage
Range
V
IDADC
CMR
ADC
V
ICADC
N
NFB
DR
V
nADC
INL
ADC Gain =
1V/1V to 8V/1V
AUXIN+ = AUXIN- =
V
DD
/2
V
REF
=
|(VREFA+)-(VREFA-)|
AUXIN+ = AUXIN- =
GND to V
DD
CMR
ADC
≥
80dB
See p.22
“ADC
Conversion Time”
VREFA+ = 3V
No missing code
(6)
SYMBOL
TEST CONDITION
MIN.
16
-
-
-
-
-
-
-
80
GND
TYP.
-
16
-
13.9
±1
±0.1
±1
±V
REF
90
-
MAX.
-
-
-
-
-
-
-
-
-
V
DD
UNIT
Bit
Bit
SPS
µVrms
LSB
%
LSB
V
dB
V
Ver.1
http://www.njr.com/
-5-
