NJW4605-T
I2C Controlled White LED Driver IC for Backlight
GENERAL DESCRIPTION
The NJW4605 is a high efficiency multiple strings white LED driver for
backlight. This device is composed with 3-channel constant current drivers,
step-up switching regulator that can drive up to 24pcs LED.
Each constant current driver is able to supply maximum current of 80mA
per channel. And the accuracy of supply current between each driver is
±2.0% (max.) controlled by high precision current control circuit. The
NJW4605 can control luminance by PWM signal input, and also features
variable switching frequency between 300kHz and 1MHz.
When an abnormal LED lighting occurs, the FLT Pin sends out signals
notifying the abnormality to the controller such as CPU. The NJW4605
operates over a wide supply voltage range from 6V to 30V, and operating
temperature is up to 105ºC.
This very wide operating temperature range makes the IC ideal for
medium sized LCD backlights, such as car navigations, note PC, and
applications for amusement device.
FEATURE
Operating Voltage Range
6.0V to 30V
Constant Current Driver 10mA to 80mA (each channel)
LED Current
±2%
max. (@I
LED
=40mA)
Switching Frequency
300kHz to 1MHz
I2C BUS Control
Luminance Control with PWM technique
Soft-start Function
FAULT Signal Output
LED Open / Short Protection
PWM Luminance Duty Ratio 0.1% Setting Available @ f
PWM
=200Hz
Over Current Protection
Over Voltage Protection
Under Voltage Lock Out Circuit
Thermal Shutdown Circuit
Package
SSOP32
■
PACKAGE OUTLINE
NJW4605V
Ver.2013-09-18
-1-
NJW4605-T
PIN CONFIGURATION
1. N.C.
2. CLK
3. FLT
4. SST
5. EO
6. EI
32. EN.
31. VDD
30. N.C.
29. N.C.
28. REG
27. N.C.
NJW4605
7. FBO
8. N.C.
9. ISET
10. SDA
11. SCL
12. N.C.
13. LED1
14. LED2
15. LED3
16. N.C.
26. EXT
25. N.C.
24. CS
23. N.C.
22. AGND
21. RT
20. N.C.
19. IGND
18. N.C.
17. OVP
BLOCK DIAGRAM
VDD
Regulator
REG
RT
OSC
EN
CLK
FLT
Control
Logic1
SLOPE
Errors
PWM
LED Open/Short
Protection
I2C
Feedback
Control
Current
Sink
Current
Setting
ISET
AGND
OVP
Current Sense
OVP
Control
Logic2
EXT
CS
OCP
UVLO
TSD
SDA
SCL
LED1
LED2
LED3
SST
EO
EI
FBO
-2-
Ver.2013-09-18
NJW4605-T
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Supply Voltage
LED Pin Voltage
OVP Pin Voltage
EN Pin Voltage
REG Pin Voltage
Each Pin Voltage: CS, EXT, SST, EO,
EI, FBO, ISET, RT
FLT Pin Voltage
Each Pin Voltage
CLK, SCL, SDA
EXT Pin Output Current
Power Dissipation
Operating Junction Temperature
Operating Temperature Range
Storage Temperature Range
SYMBOL
V
+
V
LED1
, V
LED3
, V
LED3
V
OVP
V
EN
V
REG
V
SC
, V
EXT
, V
SST
, V
EO
,
V
EI
, V
FBO
, V
ISET
, V
RT
V
FLT
V
CLK
, V
SCL
, V
SDA
I
EXT
P
D
T
j
T
opr
T
stg
(Ta=25°C)
MAXIMUM RATINGS
UNIT
V
+35
V
−0.3
to
+40
V
−0.3
to
+42
V
−0.3
to
+35
V
−0.3
to
+6
−0.3
to V
REG
−0.3
to
+6
−0.3
to
+6
±100
1,200 (*1)
1,800 (*2)
−40
to
+150
−40
to
+105
−50
to
+150
V
V
V
mA
mW
°C
°C
°C
(*1): Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard, 2Layers)
(*2): Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard, 4Layers),
internal Cu area: 74.2×74.2mm
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
OPERATING RANGE
+
Supply Voltage
V
6 to 30
LED Drive Current (*3)
I
LED1
~ I
LED3
10 to 80
EN Pin Voltage
V
EN
0 to 35
Each Pin Voltage: CLK, SCL, SDA
V
SLK
, V
SCL
, V
SDA
0 to 5.5
Oscillation Frequency
f
OSC
0.3 to 1
External Synchronous
0.3 to 1
f
OSC_SYNC
Oscillation Frequency (*4)
(*3): per 1channel
(*4): The f
OSC_SYNC
range is the following: 1.1×f
OSC
<
f
OSC_SYNC
<
1.5×f
OSC
(Ta=25°C)
UNIT
V
mA
V
V
MHz
MHz
THERMAL CHARACTERISTICS
PARAMETER
SYMBOL
THERMAL RESISTANCE
UNIT
104 ( *1 )
Junction to
°C/W
θ
ja
Ambient Temperature
69.4 ( *2 )
19.3 ( *1 )
Junction to Case
°C/W
ψ
jt
13.1 ( *2 )
(*1) :
Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard, 2Layers)
(*2) :
Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard, 4Layers),
internal Cupper area: 74.2×74.2mm
Ver.2013-09-18
-3-
NJW4605-T
ELECTRICAL CHARACTERISTICS
(Unless other noted, V
+
=12V, V
EN
=5V, C
REG
=1µF, R
ISET
=10kΩ, R
T
=47kΩ, T
a
=25°C)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP. MAX. UNIT
< General Characteristics >
Quiescent Current 1
Switching
-
3.3
6.6
mA
I
Q1
(Operating)
Quiescent Current 2
PWM Duty = 0/1024, No switching
-
2.4
4.8
mA
I
Q2
(Operating)
Quiescent Current 3 (Standby)
I
Q3_OFF
V
EN
= 0V, V
REG
= 0V
-
-
1
µA
< Built-in Regulator >
REG Pin Voltage
V
REG
I
REG
= 0mA, PWM Duty = 0/1024
4.75
5.0
5.25
V
V = 6 to 35V, I
REG
= 0mA,
Line Regulation
∆V
REG-VDD IN
-10
20
40
mV
PWM Duty = 0/1024
Load Regulation
∆V
REG-IO
I
REG
= 0 to 20mA, PWM Duty = 0/1024
-
40
100
mV
REG Pin Output Current (*5)
I
OREG
V
REG
×
0.95, PWM Duty = 0/1024
20
3.4
3.3
V
RUVLO
- V
DUVLO
-
-
3.9
3.8
0.1
-
4.4
4.3
-
mA
V
V
V
< Under Voltage Lock Out (UVLO) Block >
UVLO Release Voltage
V
RUVLO
(REG output)
UVLO Operating Voltage
V
DUVLO
(REG output)
UVLO Hysteresis Voltage
∆V
UVLO
Width (REG output)
< EN, CLK, SCL, SDA, RT, SST, FLT Pin >
EN Pin ”H” Level Voltage
V
IH_EN
(Operating)
EN Pin ”L” Level Voltage
V
IL_EN
(Standby)
EN Pin Input ”H” Level
I
IH_EN_LEAK
Leak Current
EN Pin Input ”L” Level
I
IL_EN_LEAK
Leak Current
CLK Pin Input “H” Level
V
IH_CLK
Voltage
CLK Pin Input “L” Level
V
IL_CLK
Voltage
CLK Pin Input ”H” Level
I
IH_CLK_LEAK
Leak Current
CLK Pin Input ”L” Level
I
IL_CLK_LEAK
Leak Current
SCL Pin Input “H” Level
V
IH_SCL
Voltage
SCL Pin Input “L” Level
V
IL_SCL
Voltage
SCL Pin Input ”H” Level
I
IH_SCL_LEAK
Leak Current
SCL Pin Input ”L” Level
I
IL_SCL_LEAK
Leak Current
SDA Pin Input “H” Level
V
IH_SDA
Voltage
SDA Pin Input “L” Level
V
IL_SDA
Voltage
SDA Pin Input ”H” Level
I
IH_SDA_LEAK
Leak Current
SDA Pin Input ”L” Level
I
IL_SDA_LEAK
Leak Current
SDA Pin Output ”L” Level
V
OL_SDA
Voltage
(*5): Built-in 5V Regulator can drive current
2
0
V
EN
= 5.0V
V
EN
= 0V
-1
-1
2.1
0
V
CLK
= 5.0V
V
CLK
= 0V
-1
-1
2.1
0
V
CLK
= 5.0V
V
CLK
= 0V
-1
-1
2.1
0
V
CLK
= 5.0V
V
CLK
= 0V
I
O
=3mA
-1
-1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5.5
0.4
4.5
-
5.5
0.8
1
-
5.5
0.8
1
-
5.5
0.8
1
-
0.4
V
V
µA
µA
V
V
µA
µA
V
V
µA
µA
V
V
µA
µA
V
-4-
Ver.2013-09-18
NJW4605-T
ELECTRICAL CHARACTERISTICS
(Unless other noted, V
+
=12V, V
EN
=5V, C
REG
=1µF, R
ISET
=10kΩ, R
T
=47kΩ, T
a
=25°C)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP. MAX. UNIT
< EN, CLK, SCL, SDA, RT, SST, FLT Pin >
SST Pin Source Current
I
SST_SOURCE
V
SST
= 1.5V
3.5
5.5
7.5
µA
SST Pin Sink Current
I
SST_SINK
V
SST
= 1.5V, V
OVP
= 41V
0.60
1.25
2.10
µA
SST Pin ON Resistance
R
SST_ON
V
REG
= 3.2V
0.6
1.0
1.4
kΩ
SST Pin Voltage at Operating
V
SST_OPR
-
3.3
-
V
SST Reset Voltage
V
SST_RES
-
0.1
-
V
FLT Pin Output ”L” Level
V
FLT
I
FLT
= 500µA
-
0.25
0.5
V
Voltage
FLT Pin Leak Current
I
FLT_LEAK
V
FLT
= 5.0V
-
-
1
µA
< Output Driver (EXT Pin) >
Output ”H” ON Resistance
Output ”L” ON Resistance
EXT Pin Output ”H” Level
Voltage
EXT Pin Pull Down Resistance
< Oscillator Circuit >
Oscillation Frequency
Maximum Duty Cycle
Minimum Duty Cycle
< Exterior Input Clock >
External System Clock
Maximum Frequency
External System Clock
Pulse Width ”L” Time
External System Clock
Pulse Width ”H” Time
Rise Time
Fall Time
< External Clock >
f
OSC
D
MAX
D
MIN
f
EX_sys
t
EXL
t
EXh
t
r
t
f
V
EI
= 0V
0.585
84
-
-
100
100
-
-
0.650
89
10
-
-
-
-
-
0.715
93
-
1.5
-
-
300
300
MHz
%
%
MHz
ns
ns
ns
ns
R
OH_EXT
R
OL_EXT
V
OH_EXT
R
PD_EXT
I
EXT
=
−20mA
I
EXT
= 20mA
I
EXT
=
−20mA
V
EN
= 0V, V
REG
= 0V
-
-
4.3
50
8.4
2.8
4.8
100
16.8
5.6
-
150
Ω
Ω
V
kΩ
t
f
CLK
t
EXL
t
r
t
EX
t
EXH
Ver.2013-09-18
-5-
