NLU3G17
Triple Non-Inverting
Schmitt-Trigger Buffer
The NLU3G17 MiniGatet is an advanced high−speed CMOS
triple non−inverting Schmitt−trigger buffer in ultra−small footprint.
The NLU3G17 input and output structures provide protection when
voltages up to 7.0 V are applied, regardless of the supply voltage.
The NLU3G17 can be used to enhance noise immunity or to square
up slowly changing waveforms.
Features
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MARKING
DIAGRAMS
8
1
UDFN8
CASE 517AJ
UZM
G
•
•
•
•
•
•
•
High Speed: t
PD
= 4.0 ns (Typ) @ V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on inputs
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input and Output Pins
Ultra−Small Packages
These are Pb−Free Devices
1
ULLGA8
1.45 x 1.0
CASE 613AA
DM
1
IN A1
1
8
V
CC
ULLGA8
1.6 x 1.0
CASE 613AB
LXM
G
OUT Y3
2
7
OUT Y1
1
ULLGA8
1.95 x 1.0
CASE 613AC
LXM
G
IN A2
3
6
IN A3
GND
4
5
OUT Y2
UDFN8
1.45 x 1.0
CASE 517BZ
XM
1
Figure 1. Pinout
(Top View)
1
1
1
UDFN8
1.6 x 1.0
CASE 517BY
XM
1
IN A1
IN A2
IN A3
OUT Y1
OUT Y2
OUT Y3
UDFN8
1.95 x 1.0
CASE 517CA
XM
1
Figure 2. Logic Symbol
PIN ASSIGNMENT
1
2
3
4
IN A1
OUT Y3
IN A2
GND
OUT Y2
IN A3
OUT Y1
V
CC
UZ, D or LX = Specific Device Code
M = Date Code
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
FUNCTION TABLE
A
L
H
Y
L
H
5
6
7
8
©
Semiconductor Components Industries, LLC, 2012
January, 2012
−
Rev. 3
1
Publication Order Number:
NLU3G17/D
NLU3G17
MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
T
L
T
J
MSL
F
R
I
LATCHUP
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Moisture Sensitivity
Flammability Rating Oxygen
Index: 28 to 34
V
IN
< GND
V
OUT
< GND
Parameter
Value
−0.5
to +7.0
−0.5
to +7.0
−0.5
to +7.0
−20
±20
±12.5
±25
±25
−65
to +150
260
150
Level 1
UL 94 V−0 @ 0.125 in
±500
mA
Unit
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
Latchup Performance Above V
CC
and Below GND at 125°C (Note 2)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
T
A
Dt/DV
Positive DC Supply Voltage
Digital Input Voltage
Output Voltage
Operating Free−Air Temperature
Input Transition Rise or Fall Rate
V
CC
= 3.3 V
±
0.3 V
V
CC
= 5.0 V
±
0.5 V
Parameter
Min
1.65
0
0
−55
0
0
Max
5.5
5.5
5.5
+125
No Limit
No Limit
Unit
V
V
V
°C
ns/V
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2
NLU3G17
DC ELECTRICAL CHARACTERISTICS
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
IN
w
V
T+MAX
I
OH
=
−50
mA
V
IN
w
V
T+MAX
I
OH
=
−4
mA
I
OH
=
−8
mA
V
IN
v
V
T−MIN
I
OL
= 50
mA
V
IN
v
V
T−MIN
I
OL
= 4 mA
I
OL
= 8 mA
0
v
V
IN
v
5.5 V
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
0 to
5.5
5.5
T
A
= 25
5C
Min
1.85
2.86
3.50
0.9
1.35
1.65
0.30
0.40
0.50
1.9
2.9
4.4
2.58
3.94
0
0
0
0.1
0.1
0.1
0.36
0.36
±0.1
Typ
2.0
3.0
3.6
1.5
2.3
2.9
0.57
0.67
0.74
2.0
3.0
4.5
Max
2.2
3.15
3.85
1.65
2.46
3.05
1.20
1.40
1.60
0.9
1.35
1.65
0.30
0.40
0.50
1.9
2.9
4.4
2.48
3.80
0.1
0.1
0.1
0.44
0.44
±1.0
1.20
1.40
1.60
T
A
=
+855C
Min
Max
2.2
3.15
3.85
0.9
1.35
1.65
0.30
0.40
0.50
1.9
2.9
4.4
2.34
3.66
0.1
0.1
0.1
0.52
0.52
±1.0
mA
V
1.20
1.40
1.60
T
A
=
−555C
to
+1255C
Min
Max
2.2
3.15
3.85
Unit
V
Symbol
V
T+
Parameter
Positive
Threshold
Voltage
Negative
Threshold
Voltage
Hysteresis
Voltage
Minimum
High−Level
Output
Voltage
Conditions
V
T−
V
V
H
V
V
OH
V
V
OL
Maximum
Low−Level
Output
Voltage
I
IN
Input
Leakage
Current
Quiescent
Supply
Current
I
CC
0
v
V
IN
v
V
CC
1.0
10
40
mA
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0 ns)
V
CC
(V)
3.0 to
3.6
4.5 to
5.5
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance (Note 3)
5.0
Test
Condition
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
T
A
= 25
5C
Min
Typ
7.0
8.5
4.0
5.5
5.0
7.0
Max
12.8
16.3
8.6
10.6
10
T
A
=
+855C
Min
1.0
1.0
1.0
1.0
Max
15
18.5
10
12
10
T
A
=
−555C
to
+1255C
Min
1.0
1.0
1.0
1.0
Max
17
20.5
11.5
13.5
10
pF
pF
Unit
ns
Symbol
t
PLH
,
t
PHL
Parameter
Propagation Delay,
Input A to Output Y
3. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without
load. Average operating current can be obtained by the equation I
CC(OPR)
= C
PD
•
V
CC
•
f
in
+ I
CC
. C
PD
is used to determine the no−load
dynamic power consumption: P
D
= C
PD
•
V
CC2
•
f
in
+ I
CC
•
V
CC.
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3
NLU3G17
INPUT
A or B
V
CC
50%
t
PLH
Y
50% V
CC
A 1−MHz square input wave is recommended for propagation delay tests.
t
PHL
GND
R
L
C
L
OUTPUT
Figure 3. Switching Waveforms
Figure 4. Test Circuit
V
H
V
IN
V
CC
V
T+
V
T−
GND
V
OH
V
IN
V
H
V
CC
V
T+
V
T−
GND
V
OH
V
OUT
V
OL
V
out
V
OL
(b) A Schmitt−Trigger Offers Maximum Noise Immunity
(a) A Schmitt−Trigger Squares Up Inputs With Slow Rise and Fall Times
Figure 5. Typical Schmitt−Trigger Applications
ORDERING INFORMATION
Device
NLU3G17MUTAG
NLU3G17AMX1TCG
NLU3G17BMX1TCG
NLU3G17CMX1TCG
NLU3G17DMUTCG
NLU3G17EMUTCG
NLU3G17FMUTCG
Package
UDFN8
(Pb−Free)
ULLGA8, 1.95 x 1.0, 0.5P
(Pb−Free)
ULLGA8, 1.6 x 1.0, 0.4P
(Pb−Free)
ULLGA8, 1.45 x 1.0, 0.35P
(Pb−Free)
UDFN8, 1.95 x 1.0, 0.5P
(Pb−Free)
UDFN8, 1.6 x 1.0, 0.4P
(Pb−Free)
UDFN8, 1.45 x 1.0, 0.35P
(Pb−Free)
Shipping
†
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLU3G17
PACKAGE DIMENSIONS
UDFN8 1.6x1.0, 0.4P
CASE 517BY
ISSUE O
D
A B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
DIM
A
A1
A3
b
D
E
e
L
L1
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.15
0.25
1.60 BSC
1.00 BSC
0.40 BSC
0.25
0.35
0.30
0.40
2X
2X
0.10 C
0.10 C
0.05 C
0.05 C
SIDE VIEW
e/2
e
1
4
7X
L1
ÉÉÉ
ÉÉÉ
8
PIN ONE
REFERENCE
E
TOP VIEW
A3
A
A1
C
SEATING
PLANE
RECOMMENDED
SOLDERING FOOTPRINT*
0.49
7X
L
0.26
8X
1.24
5
8X
b
0.10
0.05
0.53
M
M
1
PKG
OUTLINE
C A B
C
NOTE 3
0.40
PITCH
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
