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, 2010, NEC Electronics Corporation merged with Renesas Technology
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took over all the business of both
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April 1
st
, 2010
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Issued by:
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PRELIMINARY PRODUCT INFORMATION
MOS FIELD EFFECT TRANSISTOR
NP80N06CLD,NP80N06DLD,NP80N06ELD
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
This product is N-Channel MOS Field Effect Transistor designed for high current switching applications.
FEATURES
•
Channel Temperature 175 degree rated
•
Super Low On-state Resistance
R
DS(on)1
= 13 mΩ (MAX.) (V
GS
= 10 V, I
D
= 40 A)
R
DS(on)2
= 17 mΩ (MAX.) (V
GS
= 5 V, I
D
= 40 A)
•
Low C
iss
: C
iss
= 2360 pF (TYP.)
•
Built-in Gate protection diode
ORDERING INFORMATION
PART NUMBER
NP80N06CLD
NP80N06DLD
NP80N06ELD
PACKAGE
TO-220AB
TO-262
TO-263
ABSOLUTE MAXIMUM RATINGS (T
A
= 25 °C)
Drain to Source Voltage
Gate to Source Voltage
Drain Current (DC)
Drain Current (Pulse)
Note1
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
P
T
I
AS
Note2
60
±20
±80
±210
1.8
100
TBD
TBD
175
–55 to + 175
V
V
A
A
W
W
A
mJ
°C
°C
Total Power Dissipation (T
A
= 25 °C)
Total Power Dissipation (T
ch
= 25 °C)
Single Avalanche Current
Single Avalanche Energy
Channel Temperature
Storage Temperature
Notes 1.
PW
≤
10
µ
s, Duty cycle
≤
1 %
E
AS
T
ch
T
stg
2.
Starting T
ch
= 25 °C, R
G
= 25
Ω,
V
GS
= 20 V
→0
THERMAL RESISTANCE
Channel to Case
Channel to Ambient
Rth(ch-C)
Rth(ch-A)
1.50
83.3
°C/W
°C/W
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage
may be applied to this device.
The information contained in this document is being issued in advance of the production cycle for the
device. The parameters for the device may change before final production or NEC Corporation, at its own
discretion, may withdraw the device prior to its production.
Document No.
D13793EJ2V0PM00 (2nd edition)
Date Published January 1999 NS CP(K)
Printed in Japan
©
1998
NP80N06CLD,NP80N06DLD,NP80N06ELD
ELECTRICAL CHRACTERISTICS (T
A
= 25 °C)
CHARACTERISTICS
Drain to Source On-state Resistance
SYMBOL
R
DS(on)1
R
DS(on)2
R
DS(on)3
Gate to Source Cut-off Voltage
Forward Transfer Admittance
Drain Leakage Current
Gate to Source Leakage Current
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge 1
Total Gate Charge 2
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS(off)
| y
fs
|
I
DSS
I
GSS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G1
Q
G2
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
I
F
= 80 A, V
GS
= 0 V
I
F
= 80 A, V
GS
= 0 V, di/dt = 100 A/
µ
s
I
D
= 80 A, V
DD
= 48 V, V
GS
= 10 V
I
D
= 80 A, V
DD
= 48 V, V
GS
= 5 V
I
D
= 40 A, V
GS(on)
= 10 V, V
DD
= 30 V,
R
G
= 10
Ω
TEST CONDITIONS
V
GS
= 10 V, I
D
= 40 A
V
GS
= 5 V, I
D
= 40 A
V
GS
= 4 V, I
D
= 40 A
V
DS
= 10 V, I
D
= 250
µ
A
V
DS
= 10 V, I
D
= 40 A
V
DS
= 60 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
V
DS
= 25 V, V
GS
= 0 V, f = 1 MHz
2360
490
220
66
990
180
450
60
34
10
20
0.94
55
75
1.0
15
MIN.
TYP.
9.7
12
14
1.5
53
10
±10
3540
730
390
150
2500
400
1200
90
51
MAX.
13
17
20
2.0
UNIT
mΩ
mΩ
mΩ
V
S
µ
A
µ
A
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 SWITCHING TIME
D.U.T.
R
L
V
GS
V
GS
Wave Form
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
I
G
= 2 mA
PG.
90 %
90 %
I
D
PG.
R
G
R
G
= 10
Ω
0
I
D
10 %
V
GS (on)
90 %
R
L
V
DD
V
DD
50
Ω
V
GS
0
t
t = 1
µ
s
Duty Cycle
≤
1 %
D
Wave Form
I
0
10 %
t
d (on)
t
on
t
r
t
d (off)
t
off
10 %
t
f
2
Preliminary Product Information D13793EJ2V0PM00
NP80N06CLD,NP80N06DLD,NP80N06ELD
PACKAGE DRAWINGS (Unit : mm)
1. TO-220AB (MP-25)
2. TO-262 (MP-25 Fin Cut)
1.0±0.5
3.0±0.3
10.6 MAX.
3.6±0.2
10.0
5.9 MIN.
15.5 MAX.
4.8 MAX.
1.3±0.2
4.8 MAX.
1.3±0.2
10
4
1
2
3
1 2 3
6.0 MAX.
12.7 MIN.
1.3±0.2
1.3±0.2
0.5±0.2
0.75±0.3
2.54
2.8±0.2
0.75±0.1
2.54
2.54
1.Gate
2.Drain
3.Source
4.Fin (Drain)
0.5±0.2
2.8±0.2
2.54
1.Gate
2.Drain
3.Source
4.Fin (Drain)
3. TO-263 (JEDEC type : MP-25ZJ)
(10.0)
4
1.0±0.5
8.5±0.2
4.8 MAX.
1.3±0.2
5.7±0.4
1.4±0.2
0.7±0.2
(2.54) 1
2
3
(2.54)
.5
(0
R)
(
R
0.8
)
0.5±0.2
2.8±0.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
12.7 MIN.
4
8.5±0.2
Preliminary Product Information D13793EJ2V0PM00
3
