NTD14N03R, NVD14N03R
Power MOSFET
14 A, 25 V, N−Channel DPAK
Features
•
•
•
•
•
Planar HD3e Process for Fast Switching Performance
Low R
DS(on)
to Minimize Conduction Loss
Low C
iss
to Minimize Driver Loss
Low Gate Charge
Optimized for High Side Switching Requirements in
High−Efficiency DC−DC Converters
•
NVD and SVD Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC−Q101 Qualified and PPAP Capable
•
These Devices are Pb−Free and are RoHS Compliant
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14 AMPERES, 25 VOLTS
R
DS(on)
= 70.4 mW (Typ)
D
N−CHANNEL
G
S
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise specified)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Thermal Resistance − Junction−to−Case
Total Power Dissipation @ T
A
= 25°C
Drain Current − Continuous @ T
A
= 25°C, Chip
− Continuous @ T
A
= 25°C, Limited by Package
− Single Pulse (tp
≤
10
ms)
Thermal Resistance, Junction−to−Ambient
(Note 1)
Total Power Dissipation @ T
A
= 25°C
Drain Current − Continuous @ T
A
= 25°C
Thermal Resistance, Junction−to−Ambient
(Note 2)
Total Power Dissipation @ T
A
= 25°C
Drain Current − Continuous @ T
A
= 25°C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
Symbol
V
DSS
V
GS
R
qJC
P
D
I
D
I
D
I
D
R
qJA
P
D
I
D
R
qJA
P
D
I
D
T
J
, T
stg
T
L
Value
25
±20
6.0
20.8
14
11.4
28
80
1.56
3.1
120
1.04
2.5
−55 to
150
260
Unit
Vdc
Vdc
°C/W
W
A
A
A
°C/W
W
A
°C/W
W
A
°C
°C
A
Y
WW
14N03
G
1
Gate
1 2
3
4
DPAK
CASE 369C
(Surface Mount)
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENTS
4 Drain
AYWW
T14
N03G
2
Drain
3
Source
= Assembly Location*
= Year
= Work Week
= Device Code
= Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 sq. in pad size.
2. When surface mounted to an FR4 board using minimum recommended pad
size.
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
©
Semiconductor Components Industries, LLC, 2016
1
November, 2016 − Rev. 9
Publication Order Number:
NTD14N03R/D
NTD14N03R, NVD14N03R
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Characteristics
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3)
(V
GS
= 0 Vdc, I
D
= 250
mAdc)
Temperature Coefficient (Positive)
Zero Gate Voltage Drain Current
(V
DS
= 20 Vdc, V
GS
= 0 Vdc)
(V
DS
= 20 Vdc, V
GS
= 0 Vdc, T
J
= 150°C)
Gate−Body Leakage Current
(V
GS
=
±20
Vdc, V
DS
= 0 Vdc)
ON CHARACTERISTICS
(Note 3)
Gate Threshold Voltage (Note 3)
(V
DS
= V
GS
, I
D
= 250
mAdc)
Threshold Temperature Coefficient (Negative)
Static Drain−to−Source On−Resistance (Note 3)
(V
GS
= 4.5 Vdc, I
D
= 5 Adc)
(V
GS
= 10 Vdc, I
D
= 5 Adc)
Forward Transconductance (Note 3)
(V
DS
= 10 Vdc, I
D
= 5 Adc)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS
(Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Gate Charge
(V
GS
= 5 Vdc, I
D
= 5 Adc,
V
DS
= 10 Vdc) (Note 3)
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
(I
S
= 5 Adc, V
GS
= 0 Vdc) (Note 3)
(I
S
= 5 Adc, V
GS
= 0 Vdc, T
J
= 125°C)
V
SD
−
−
t
rr
(I
S
= 5 Adc, V
GS
= 0 Vdc,
dI
S
/dt = 100 A/ms) (Note 3)
Reverse Recovery Stored Charge
t
a
t
b
Q
RR
−
−
−
−
0.93
0.82
6.6
4.75
1.88
0.002
1.2
−
−
−
−
−
mC
Vdc
(V
GS
= 10 Vdc, V
DD
= 10 Vdc,
I
D
= 5 Adc, R
G
= 3
W)
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
1
Q
2
−
−
−
−
−
−
−
3.8
27
9.6
2.0
1.8
0.8
0.7
−
−
−
−
−
−
−
nC
ns
(V
DS
= 20 Vdc, V
GS
= 0 V, f = 1 MHz)
C
iss
C
oss
C
rss
−
−
−
115
62
33
−
−
−
pF
V
GS(th)
1.0
−
R
DS(on)
−
−
g
FS
−
7.0
−
117
70.4
130
95
Mhos
1.5
−
2.0
−
Vdc
mV/°C
mW
V(br)
DSS
25
−
I
DSS
−
−
I
GSS
−
−
−
−
1.0
10
±100
nAdc
28
−
−
−
Vdc
mV/°C
mAdc
Symbol
Min
Typ
Max
Unit
Reverse Recovery Time
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: Pulse Width
≤
300
ms,
Duty Cycle
≤
2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NTD14N03R, NVD14N03R
TYPICAL CHARACTERISTICS
14
I
D
, DRAIN CURRENT (AMPS)
12
10
8
6
4
3V
2
V
GS
= 2.5 V
0
0
2
4
6
8
10
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0
0
1
2
3
4
5
6
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
14
5V
I
D
, DRAIN CURRENT (AMPS)
12
10
8
6
T
J
= 25°C
4
2
T
J
= 125°C
T
J
= −55°C
V
DS
≥
10 V
10 V
8V
7V
6V
4.5 V
4V
3.5 V
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.20
V
GS
= 10 V
0.16
0.20
T
J
= 125°C
0.16
T
J
= 25°C
0.12
T
J
= 125°C
T
J
= 25°C
T
J
= −55°C
0.12
0.08
0.08
T
J
= −55°C
0.04
0
0
2
4
6
8
10
12
14
I
D
, DRAIN CURRENT (AMPS)
0.04
V
GS
= 4.5 V
0
0
2
4
6
8
10
12
14
I
D
, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus Drain Current
and Temperature
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
1.8
1.6
1.4
1.2
1
0.8
0.6
−50
10
−25
0
25
50
75
100
125
150
0
I
D
= 5 A
V
GS
= 10 V
I
DSS
, LEAKAGE (nA)
1000
Figure 4. On−Resistance versus Drain Current
and Temperature
V
GS
= 0 V
T
J
= 150°C
100
T
J
= 125°C
5
10
15
20
25
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
NTD14N03R, NVD14N03R
TYPICAL CHARACTERISTICS
V
DS
= 0 V V
GS
= 0 V
C, CAPACITANCE (pF)
160
C
iss
C
rss
120
T
J
= 25°C
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
200
8
6
Q
T
4
Q
1
Q
2
V
GS
C
iss
80
C
oss
C
rss
40
0
10
5
V
GS
0 V
DS
5
10
15
2
I
D
= 5 A
T
J
= 25°C
0
0
0.4
0.8
1.2
1.6
2.0
Q
g
, TOTAL GATE CHARGE (nC)
20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE
(VOLTS)
Figure 7. Capacitance Variation
100
I
S
, SOURCE CURRENT (AMPS)
V
DS
= 10 V
I
D
= 5 A
V
GS
= 10 V
t
r
t, TIME (ns)
70
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
V
GS
= 0 V
60
50
40
30
T
J
= 150°C
20
10
0
T
J
= 25°C
0
0.2
0.4
0.6
0.8
1.0
10
t
d(off)
t
d(on)
t
f
1
1
10
R
G
, GATE RESISTANCE (W)
100
V
SD
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
100
Figure 10. Diode Forward Voltage versus
Current
I
D
, DRAIN CURRENT (A)
10
10
ms
100
ms
1
0 V < V
GS
< 20 V
Single Pulse
T
A
= 25°C
R
DS(on)
Limit
Thermal Limit
Package Limit
0.1
1
10
1 ms
10 ms
0.1
dc
0.01
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NTD14N03R, NVD14N03R
TYPICAL CHARACTERISTICS
1000
D = 0.5
100
R(t)
(°C/W)
10
0.2
0.1
0.05
0.02
1 0.01
0.1
SINGLE PULSE
0.01
0.000001
0.00001
0.0001
0.001
0.01
t, TIME (s)
0.1
1
10
100
1000
Figure 12. Thermal Response
ORDERING INFORMATION
Device
NTD14N03RT4G
NVD14N03RT4G*
SVD14N03RT4G*
Package
DPAK
(Pb−Free)
DPAK
(Pb−Free)
DPAK
(Pb−Free)
Shipping
†
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NVD and SVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified
and PPAP Capable.
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5
