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PRELIMINARY

DECEMBER 2001

NX25F011B, NX25F021B, NX25F041B

1M-BIT, 2M-BIT, AND 4M-BIT

SERIAL FLASH MEMORIES WITH 4-PIN SPI INTERFACE

This document contains PRELIMINARY INFORMATION. NexFlash reserves the right to make changes to its product at any time without notice in order to improve design and supply the best possible

product. We assume no responsibility for any errors which may appear in this publication.



NexFlash Technologies, Inc.

PRELIMINARY

NXSF016F-1201

12/12/01 ©

NX25F011B

NX25F021B

NX25F041B

Table of Contents

1M-BIT, 2M-BIT, AND 4M-BIT ......................................................................................................................................... 1

SERIAL FLASH MEMORIES WITH 4-PIN SPI INTERFACE .......................................................................................... 1

FEATURES ..................................................................................................................................................................... 4

DESCRIPTION ............................................................................................................................................................... 4

FUNCTIONAL OVERVIEW ............................................................................................................................................. 5

Pin Descriptions ....................................................................................................................................................... 5

Package ............................................................................................................................................................... 5

Serial Data Input (SI) ............................................................................................................................................ 6

Serial Data Output (SO) ....................................................................................................................................... 6

Serial Clock (SCK) ............................................................................................................................................... 6

Chip Select (CS) .................................................................................................................................................. 6

Write Protect (WP) ............................................................................................................................................... 6

Hold or Ready/Busy (HOLD or R/B) ...................................................................................................................... 6

Power Supply Pins (Vcc and Gnd) ........................................................................................................................ 6

Serial Flash Memory Array ....................................................................................................................................... 7

Serial SRAM ............................................................................................................................................................. 8

Using the SRAM Independent of Flash Memory ................................................................................................... 9

Write Protection ........................................................................................................................................................ 9

Configuration Register .............................................................................................................................................. 9

Write Protect Range and Direction, WR[3:0], WD ................................................................................................ 10

Read Clock Edge, RCE ...................................................................................................................................... 10

Table 2A. Write Protect Range Sector Selection (Hex) ........................................................................................ 11

Table 2B. Write Protect Range Sector Selection (Hex) ........................................................................................ 11

Table 2C. Write Protect Range Sector Selection (Hex) ........................................................................................ 11

HOLD-R/B, HR[1:0] ............................................................................................................................................ 11

Status Register Bit Descriptions ............................................................................................................................. 12

Compare Not Equal, CNE ................................................................................................................................... 12

Power Detect, PD ............................................................................................................................................... 12

Write Enable/Disable, WE................................................................................................................................... 12

Command Set ........................................................................................................................................................ 13

Command Set for the NX25F011B, NX25F021B and NX25F041B Serial Flash Memory ..................................... 15

SERIAL FLASH SECTOR COMMANDS ....................................................................................................................... 16

Read From Sector (52H) ......................................................................................................................................... 16

Read From Sector with Auto Increment (50H) ......................................................................................................... 16

Read From Sector Low Frequency (51H) and .......................................................................................................... 16

Read From Sector Low Frequency with Auto Increment (5BH) ................................................................................ 16

Write Enable (06H) .................................................................................................................................................. 16

Write Disable (04H) ................................................................................................................................................. 16

Write to Sector Through SRAM (F3H) ..................................................................................................................... 18

SERIAL SRAM COMMANDS ....................................................................................................................................... 19

Write to SRAM Command (72H) ............................................................................................................................. 19

Read from SRAM (71H) .......................................................................................................................................... 19

Transfer All of SRAM to Sector (F3H) ..................................................................................................................... 20

Transfer All of Sector to SRAM (53H) ..................................................................................................................... 20

Compare Sector to SRAM (8DH) ............................................................................................................................ 21

CONFIGURATION AND STATUS COMMANDS ............................................................................................................ 21

Read Configuration Register (8CH) ......................................................................................................................... 21

Write Non-Volatile Configuration

Register (8AH) ........................................................................................................................................................ 22

NexFlash Technologies, Inc.

PRELIMINARY

NXSF016F-1201

12/12/01 ©

NX25F011B

NX25F021B

NX25F041B

Table of Contents

(cont’d)

Read Status Register (84H) .................................................................................................................................... 22

Clear Compare Status (89H) ................................................................................................................................... 23

Set Power Detection Bit (03H) ................................................................................................................................ 23

Reset Power Detection Bit (09H) ............................................................................................................................. 23

Read Device Information Sector (15H) .................................................................................................................... 24

SPECIAL SECTOR COMMANDS ................................................................................................................................. 24

Erase Sector (F1H) ................................................................................................................................................. 24

Erase Block (F4H) .................................................................................................................................................. 25

Write-only to Sector (F2H) ...................................................................................................................................... 25

COMPATIBILITY COMMANDS FOR 25xxxA SERIES DEVICES ................................................................................. 26

Read from SRAM (81H) .......................................................................................................................................... 26

Read Configuration Register (8BH) ......................................................................................................................... 27

Read Status Register (83H) .................................................................................................................................... 27

Transfer Sector to SRAM Clocked (54H) ................................................................................................................. 28

Compare Sector to SRAM Clocked (86H) ............................................................................................................... 28

Sector Format ........................................................................................................................................................ 29

High Data Integrity Applications .............................................................................................................................. 29

Write/Verify Flow .................................................................................................................................................... 29

Grouping Static and Frequently

Updated Data .......................................................................................................................................................... 29

ABOSOLUTE MINIMUM RATINGS .............................................................................................................................. 30

OPERATING RANGES ................................................................................................................................................. 30

DC ELECTRICAL CHARACTERISTICS (Preliminary) ................................................................................................. 30

AC ELECTRICAL CHARACTERISTICS (Preliminary) ................................................................................................. 31

SERIAL OUTPUT TIMING ............................................................................................................................................ 32

SERIAL INPUT TIMING ................................................................................................................................................ 32

HOLD TIMING .............................................................................................................................................................. 32

PACKAGING INFORMATION ........................................................................................................................................ 33

200-mil Plastic SOIC Package Code: (S) ............................................................................................................ 33

PACKAGING INFORMATION ........................................................................................................................................ 34

330 mil Plastic SOIC Package Code: (J) ............................................................................................................ 34

PACKAGING INFORMATION ........................................................................................................................................ 35

Plastic TSOP - 28-pins Package Code: Type I (V) ............................................................................................... 35

PRELIMINARY DESIGNATION .................................................................................................................................... 36

IMPORTANT NOTICE ................................................................................................................................................... 36

ORDERING INFORMATION ......................................................................................................................................... 36

LIFE SUPPORT POLICY ............................................................................................................................................. 36

Trademarks: ................................................................................................................................................................. 36

NexFlash Technologies, Inc.

PRELIMINARY

NXSF016F-1201

12/12/01 ©

NX25F011B

NX25F021B

NX25F041B

FEATURES

• Flash Storage for Resource-Limited Systems

– Ideal for portable/mobile and microcontroller-based

applications that store voice, text, and data

• 0.35µ

NexFlash

Memory Technology

– 1M/2M/4M-bit with 512/1024/2048 sectors

– Small 264-byte sectors

– Erase/Write time of 7.5 ms/sector (typical)

– Optional 8KB (32 sector) block erase for faster

programming

• Ultra-low Power for Battery-Operation

– Single 5V or 3V supply for read and erase/write

– 1 mA standby current, 2.5 mA active @ 3V (typical)

– Low frequency read command for lower power

• 4-pin SPI Serial Interface

– Easily interfaces to popular microcontrollers

– Clock operation as fast as 20 MHz

• On-chip Serial SRAM

– Single 264-byte Read/Write SRAM buffer

– Use in conjunction with or independent of Flash

– Off-loads RAM-limited microcontrollers

• Special Features for Media-Storage Applications

– Byte-level addressing for reads and SRAM writes

– Transfer or compare sector to SRAM

– Versatile hardware and software write-protection

– In-system electronic part number option

– Removable Serial Flash Module package option

– Serial Flash Development Kit

DESCRIPTION

The NX25F011B, NX25F021B, and NX25F041B Serial

Flash memories provide a storage solution for systems

limited in power, pins, space, hardware, and firmware

resources. They are ideal for applications that store voice,

text, and data in a portable or mobile environment. Using

NexFlash's

patented single transistor EEPROM cell, the

devices offer a high-density, low-voltage, low-power, and

cost-effective non-volatile memory solution. The devices

operate on a single 5V or 3V (2.7V-3.6V) supply for Read

and Erase/Write with typical current consumption as low as

2.5 mA active and less than 1

µA

standby. Sector

erase/write speeds as fast as 7.5 ms increase system

performance, minimize power-on time, and maximize

battery life.

The NX25F011B, NX25F021B, and NX25F041B provide

1M-bit, 2M-bit, and 4M-bit of flash memory organized as 512,

1024, or 2048 sectors of 264 bytes each. Each sector is

individually addressable through basic serial-clocked com-

mands. The 4-pin SPI serial interface works directly with

popular microcontrollers. Special features include: on-chip

serial SRAM, byte-level addressing, double-buffered sector

writes, transfer/compare sector to SRAM, hardware and

software write protection, alternate oscillator frequency, elec-

tronic part number, and removable Serial Flash Module

package option. Development is supported with the

PC-based SFK-SPI Serial Flash Development Kit.

NexFlash Technologies, Inc.

PRELIMINARY

NXSF016F-1201

12/12/01 ©

NX25F011B

NX25F021B

NX25F041B

FUNCTIONAL OVERVIEW

An architectural block diagram of the NX25F011B,

NX25F021B, and NX25F041B is shown in Figure 2. Key

elements of the architecture include:

•

SPI Interface and Command Set Logic

Serial Flash Memory Array

Serial SRAM and Program Buffer

Write Protection Logic

Configuration and Status Registers

Device Information Sector

Pin Descriptions

Package

The NX25F011B, NX25F021B, and NX25F041B are

available in a 28-pin TSOP (Type I) surface mount package.

The NX25F011B and NX25F021B are available in either an

8-pin SOIC and a 14-pin TSOP package (contact NexFlash

for information on the 14-pin TSOP package). The

NX25F041B is also available in a 28-pin SOIC package.

See Figure 3A, 3B and Table 1 for pin assignments. All

interface and supply pins are on one side of the TSOP

package. The “No Connect” (NC) pins are not connected to

the device, allowing the pads and the area around them to

be used for routing PCB system traces. The devices are

also available in a cost-effective and space-efficient

removable Serial Flash Module package.

DEVICE INFORMATION SECTOR (DIS)

(READ ONLY)

ROW DECODE (

512, 1024 AND 2048

SECTORS)

NexFlash

1, 2 AND 4 M-BIT

SERIAL FLASH MEMORY ARRAY

512, 1024 AND 2048

BYTE-ADDRESSABLE

SECTORS OF 264 BYTES EACH

ORGANIZED IN 16, 32, AND 64

BLOCKS OF 32 SECTORS PER BLOCK

WRITE CONTROL

LOGIC

WRITE PROTECT LOGIC

HOLD

OR R/B

HOLD OR

READ/BUSY

LOGIC

CONFIGURATION

STATUS

2112

SRAM (264 BYTES)

HIGH-VOLTAGE

GENERATORS

9/10/11

SCK

SPI

COMMAND

AND

CONTROL

LOGIC

SECTOR-ADDRESS

LATCH

DATA

COLUMN DECODE, SENSE AMP LATCH

AND DATA COMPARE LOGIC

BYTE-ADDRESS

LATCH/COUNTER

Figure 2. NX25F011B, NX25F021B, and NX25F041B Architectural Block Diagram

NexFlash Technologies, Inc.

PRELIMINARY

NXSF016F-1201

12/12/01 ©

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