NX3P1108
Logic controlled high-side power switch
Rev. 1 — 9 January 2013
Product data sheet
1. General description
The NX3P1108 is a high-side load switch which features a low ON resistance P-channel
MOSFET that supports more than 1.5 A of continuous current. It has an integrated output
discharge resistor to discharge the output capacitance when disabled. Designed for
operation from 0.9 V to 3.6 V, it is used in power domain isolation applications to reduce
power dissipation and extend battery life. The enable logic includes integrated logic level
translation making the device compatible with lower voltage processors and controllers.
The NX3P1108 is ideal for portable, battery operated applications due to low ground
current and ultra-low OFF-state current.
2. Features and benefits
Wide supply voltage range from 0.9 V to 3.6 V
Very low ON resistance:
34 m at a supply voltage of 3.3 V
High noise immunity
Low OFF-state leakage current (2.0
A
maximum)
1.2 V control logic at a supply voltage of 3.6 V
High current handling capability (1.5 A continuous current)
Internal output discharge resistor
Turn-on slew rate limiting
ESD protection:
HBM JESD22-A114F Class 3A exceeds 4000 V
CDM AEC-Q100-011 revision B exceeds 500 V
Specified from
40 C
to +85
C
3. Applications
Cell phone
Digital cameras and audio devices
Portable and battery-powered equipment
NXP Semiconductors
NX3P1108
Logic controlled high-side power switch
4. Ordering information
Table 1.
Ordering information
Package
Temperature range
NX3P1108UK
40 C
to +85
C
Name
WLCSP4
Description
wafer level chip-size package; 4 bumps; 0.96
0.96
0.55 mm. (Backside coating included)
Version
NX3P1107/NX3P1108
Type number
5. Marking
Table 2.
Marking codes
Marking code
xB
Type number
NX3P1108UK
6. Functional diagram
9,1
5GFK
9287
(1
EN
VIN
001aao342
/(9(/ 6+,)7
6/(: 5$7( &21752/
$1' /2$' ',6&+$5*(
VOUT
DDD
Fig 1.
Logic symbol
Fig 2.
Logic diagram (simplified schematic)
7. Pinning information
7.1 Pinning
EXPS $
LQGH[ DUHD
$
%
DDD
1;3
$
%
9287
*1'
9,1
(1
DDD
7UDQVSDUHQW WRS YLHZ
7UDQVSDUHQW WRS YLHZ
Fig 3.
Pin configuration for WLCSP4
Fig 4.
Ball mapping for WLCSP4
NX3P1108
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 9 January 2013
2 of 16
NXP Semiconductors
NX3P1108
Logic controlled high-side power switch
7.2 Pin description
Table 3.
Symbol
VOUT
GND
VIN
EN
Pin description
Pin
A1
B1
A2
B2
Description
output voltage
ground (0 V)
input voltage
enable input (active HIGH)
8. Functional description
Table 4.
Input EN
L
H
[1]
H = HIGH voltage level; L = LOW voltage level.
Function table
[1]
Switch
switch OFF
switch ON
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
I
V
SW
I
IK
I
SK
Parameter
input voltage
switch voltage
input clamping current
switch clamping current
Conditions
input EN
input VIN
output VOUT
input EN: V
I(EN)
<
0.5
V
input VIN: V
I(VIN)
<
0.5
V
output VOUT: V
O(VOUT)
<
0.5
V
output VOUT: V
O(VOUT)
> V
I(VIN)
+ 0.5 V
I
SW
T
j(max)
T
stg
P
tot
[1]
[2]
[3]
[1]
[2]
[2]
Min
0.5
0.5
0.5
50
50
50
-
-
40
65
[3]
Max
+4.0
+4.0
V
I(VIN)
-
-
-
50
1500
+125
+150
300
Unit
V
V
V
mA
mA
mA
mA
mA
C
C
mW
switch current
maximum junction
temperature
storage temperature
total power dissipation
V
SW
>
0.5
V
-
The minimum input voltage rating may be exceeded if the input current rating is observed.
The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.
The (absolute) maximum power dissipation depends on the junction temperature Tj. Higher power dissipation is allowed in conjunction
with lower ambient temperatures. The conditions to determine the specified values are T
amb
= 85
C
and the use of a two layer PCB.
NX3P1108
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 9 January 2013
3 of 16
NXP Semiconductors
NX3P1108
Logic controlled high-side power switch
10. Recommended operating conditions
Table 6.
V
I
T
amb
Recommended operating conditions
Conditions
Min
0.9
40
Max
3.6
+85
Unit
V
C
input voltage
ambient temperature
Symbol Parameter
11. Thermal characteristics
Table 7.
Symbol
R
th(j-a)
[1]
Thermal characteristics
Parameter
thermal resistance from junction to ambient
Conditions
[1][2]
Typ
84
Unit
K/W
The overall R
th(j-a)
can vary depending on the board layout. To minimize the effective R
th(j-a)
, all pins must have a solid connection to
larger Cu layer areas for example, to the power and ground layer. In multi-layer PCB applications, use the second layer to create a large
heat spreader area right below the device. If this layer is either ground or power, connect it with several vias to the top layer connected
to the device ground or supply. Try not to use any solder-stop varnish under the chip.
Rely on the measurement data given for a rough estimation of the R
th(j-a)
in your application. The actual R
th(j-a)
value may vary in
applications using different layer stacks and layouts
[2]
12. Static characteristics
Table 8.
Static characteristics
V
I(VIN)
= 0.9 V to 3.6 V, unless otherwise specified; Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
HIGH-level
input voltage
Conditions
EN input
V
I(VIN)
= 0.9 V to 1.1 V
V
I(VIN)
= 1.1 V to 1.3 V
V
I(VIN)
= 1.3 V to 1.8 V
V
I(VIN)
= 1.8 V to 3.6 V
V
IL
LOW-level
input voltage
EN input
V
I(VIN)
= 0.9 V to 1.1 V
V
I(VIN)
= 1.1 V to 1.3 V
V
I(VIN)
= 1.3 V to 1.8 V
V
I(VIN)
= 1.8 V to 3.6 V
I
I
I
GND
I
S(OFF)
input leakage
current
V
I(EN)
= 0 V or 3.6 V
-
-
-
-
-
-
-
-
-
-
-
0.1
-
0.1
-
-
-
-
-
-
-
-
-
-
-
-
2
-
0.2
0.3
0.4
0.45
1
-
2.0
V
V
V
V
A
A
A
-
-
-
-
-
-
-
-
-
-
-
-
0.8
1.0
1.1
1.1
-
-
-
-
V
V
V
V
T
amb
= 25
C
Min
Typ
Max
T
amb
=
40 C
to +85
C
Unit
Min
Max
ground current V
I(EN)
= 0 V or 3.6 V; VOUT open;
see
Figure 5
and
Figure 6
OFF-state
leakage
current
discharge
resistance
V
I(VIN)
= 3.6 V; V
I(EN)
= GND;
V
I(VOUT)
= GND; see
Figure 10
and
Figure 11
VOUT output; V
I(VIN)
= 3.3 V
R
dch
-
120
-
-
-
NX3P1108
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 9 January 2013
4 of 16
NXP Semiconductors
NX3P1108
Logic controlled high-side power switch
12.1 Graphs
,
*1'
DDD
,
*1'
DDD
7
DPE
9
V
I(EN)
= V
I(VIN)
.
(1) V
I(VIN)
= 3.6 V.
(2) V
I(VIN)
= 3.3 V.
(3) V
I(VIN)
= 1.2 V.
(4) V
I(VIN)
= 0.9 V.
V
I(EN)
= V
I(VIN)
.
(1) T
amb
=
40 C.
(2) T
amb
= 25
C.
(3) T
amb
= 85
C.
Fig 5.
Waveform showing the ground current versus
temperature
Fig 6.
Waveform showing the ground current versus
input voltage on pin VIN
,
*1'
DDD
,
*1'
DDD
9
V
I(EN)
= 1.2 V
(1) V
I(VIN)
= 3.6 V.
(2) V
I(VIN)
= 3.3 V.
(3) V
I(VIN)
= 1.2 V.
(4) V
I(VIN)
= 0.9 V.
V
I(EN)
= 1.2 V
(1) T
amb
=
40 C.
(2) T
amb
= 85
C.
(3) T
amb
= 25
C.
Fig 7.
Waveform showing the ground current versus
temperature
Fig 8.
Waveform showing the ground current versus
input voltage on pin VIN
© NXP B.V. 2013. All rights reserved.
NX3P1108
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 1 — 9 January 2013
5 of 16
