PEDF1231T-M-05-01
1
Electronic Components
OAT1231T-M-05
Preliminary
This version:
Oct. 2000
Previous version: May 2000
MT-RJ Transceiver at 1.25 Gbit/s
GENERAL DESCRIPTION
The OAT1231T-M-05 transceiver is a short wavelength optical transceiver intended for up to 1.25 Gbit/s
applications such as Gigabit Ethernet and Fibre Channel. Reduced laser power permits Class I laser operation
without an Open Fibre Control (OFC) circuit. The transceiver operate from 3.3 V DC power supply and with
LVPECL logic interface. Package style is the multisourced 2
×
5 pin small form factor with integral MT-RJ
connector interface. The Transceiver is provide double port densities from traditional SC 1
×
9 transceiver.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
Multisourced 2
×
5 pin small form factor package
MT-RJ connector interface
Compliant with IEEE 802.3 z/Gigabit Ethernet
Transmission length
-Up to 550 m with 50/125
µm
MMF Cables
-Up to 220 m with 62.5/125
µm
MMF Cables
Single 3.3 V power supply
LVPECL logic compatible data interface
850 nm Vertical Cavity Surface Emitting Laser (VECSEL)
Class I Laser eye safe
0°C to 70°C operating temperature range
Transmitter disable input
TTL signal detect output
Wave solderable and aqueous washable
ABSOLUTE MAXIMUM RATINGS
Parameter
Storage Temperature
Operating Temperature
Lead Soldering Temperature
Supply Voltage
Symbol
T
S
T
A
—
V
CC
Min
–40
0
—
—
Max
85
70
260/10
5
Unit
°C
°C
°C/s
V
1/7
PEDF1231T-M-05-01
1
Semiconductor
OAT1231T-M-05
TRANSCEIVER OPTICAL AND ELECTRICAL CHARACTERISTICS
Transmitter Section (T
C
= 0°C to 70°C, V
CC
= 3.135 V to 3.465 V)
Parameter
Average Optical Output
Power
Optical Wavelength
RMS Spectral Width
Extinction Ratio
Relative Intensity Noise
Output Rise Time
Output Fall Time
Power Supply Current
Differential Input Voltage
Deterministic Jitter
Total Jitter
Transmit Disable Voltage
Disable
Enable
3
3
5
5
1, 2
1, 2
50
µm
MMF
Notes
Symbol
P
O
λc
∆λ
Er
RIN
T
R
T
F
I
CCT
V
IN
DJ
TJ
V
ID
V
IE
Min.
–9.5
830
—
9
—
—
—
—
0.7
—
—
V
CC
– 1.3
—
Max.
–3
860
0.85
—
–117
260
260
60
2.2
0.10
0.284
—
0.8
Unit
dBm
nm
nm
dB
dB/Hz
ps
ps
mA
V
UI
UI
V
V
Receiver Section (T
C
= 0°C to 70°C, V
CC
= 3.135 V to 3.465 V)
Parameter
Optical Input Sensitivity
Optical Wavelength
Return Loss
Power Supply Current
Output Voltage Levels
Signal Detect Output Voltage
High
Low
4
5
5
I
CCR
V
OL
V
OH
V
OA
V
OD
Notes
6
Symbol
P
IN
λc
Min
–17
770
12
—
V
CC
– 1.892
V
CC
– 1.051
V
CC
– 0.8
—
Max
–3
860
—
115
V
CC
– 1.548
V
CC
– 0.879
—
0.4
Unit
dBm
nm
dB
mA
V
V
V
V
Notes:
1. Measured from 20 to 80% point on rising and
falling edge of unfiltered waveform.
2. Transmitter optical waveform characteristics
are specified by an eye diagram shown in
Figure 1.
The eye mask test is performed using a
receiver with a fourth-order Bessel Thompson
filter discussed in IEEE802.3Z.
3. Compliance point is TP1 to TP2 per
IEEE802.3 z, section clause 38.6.11
TD = DJ + RJ
4. LVPECL compatible interface.
5. TTL compatible interface.
6. BER of 1
×
10
-12
measured with 1.25 Gbit/s
2
7
–1 PRBS.
130
100
Normalized Amplitude (%)
80
50
20
0
–20
0
22
37.5
62.5
78
100
Normalized Time (% of Unit Interval)
Figure 1. Transmitter Eye Diagram
2/7
PEDF1231T-M-05-01
1
Semiconductor
OAT1231T-M-05
APPLICATION INFORMATION
Handling precautions
OKI advises that precautions be taken to avoid electrostatic discharge (ESD) during handling, assembly, and
testing of the OAT1231T-M-05. Degradation or damage can occur if proper guidelines for handling ESD sensitive
devices are not followed. This could result in an inoperable device or unsafe operation.
In particular, avoid getting particulate or solvent contamination onto the optical surfaces of the laser and photo-
detector assemblies. It is also strongly recommended that the MT-RJ connector receptacle be covered when not in
use, using the Process Plug that is supplied with the OAT1231T-M-05 transceiver.
Regulatory information
The OKI OAT1231T-M-05 module is certified to be Class I laser product under the requirements of U. S. 21 CFR
Subchapter J when used as specified by OKI. Class I products are considered to be safe. Any modification,
adjustment, or use of the OAT1231T-M-05 module not specified by OKI may void the certification of the product
and constitute an act of new manufacturing of a laser product under 21 CFR Subchapter J, and as such will require
recertification by the new manufacturer.
Signal Detect
The Signal Detect(SD) output is positive TTL logic. This output provides a logical low output signal when the
optical signal into the receiver has been interrupted or the light level has fallen below the minimum signal-detect
threshold. This signal is used to get a state of receiving DATA logically, not a BET monitor.
Transmitter Disable
The Transmitter Disable(Tdis) input is a laser enable function. When Tdis is TTL logical low input or opened
transmitter is normally operating. When Tdis is TTL logical high input transmitter optical output is shut down.
3/7
PEDF1231T-M-05-01
1
Semiconductor
OAT1231T-M-05
PIN DESCRIPTION
RX
TX
Mounting Studs
Top View
Grounding Tads
1
2
3
4
5
10
9
8
7
6
Figure 2. Pin Description
Pin
Symbol
Description
Two mounting studs are provided for transceiver mechanical attachment to the circuit
board. They may also provide an optical connection of the transceiver to the equipment
chassis ground.
Four grounding tabs are provided for improvement of EMI suppression. They should be
connected to signal ground.
Receiver Signal Ground.
Receiver Power Supply.
Signal Detect.
Normal Operation: Logic “1” Output.
Fault Condition: Logic “0” Output.
Received Data Out Bar. No internal terminations are provided.
Received Data Out. No internal terminations are provided.
Transmitter Power Supply.
Transmitter Signal Ground.
Transmitter Disable.
Normal Operation: Logic “0” Input or Open
Transmit Disable: Logic “1” Input or Connect V
CC
Transmitter Data In. An internal 50
Ω
termination is provided, consisting of a Thevenin
termination.
Transmitter Data In Bar. An internal 50
Ω
termination is provided, consisting of a Thevenin
termination.
Two Mounting
Studs
Four Grounding
Tabs
1
2
3
4
5
6
7
8
V
EER
V
CCR
SD
RD–
RD+
V
CCT
V
EET
T
DIS
9
10
TD+
TD–
4/7
PEDF1231T-M-05-01
1
Semiconductor
OAT1231T-M-05
ELECTRICAL INTERFACE CIRCUITS
V
EET
TD+
VCSEL
DRIVER
PECL
INPUT
7
9
SEE NOTE 1
TD+
100
Ω
10
VCSEL
CONTROL
CIRCUIT
TD–
8
T
DIS
FROM
TTL
OUTPUT
TD–
PECL
OUTPUT
DRIVER
OAT1231T-M-05
V
CCT
6
TRANSCEIVER
V
CCR
2
POWER SUPPLY
FILTER
V
CCT
+3.3 V
POWER SUPPLY
FILTER
SERDES
LEVEL
CETECTOR
3
SD
4
TZ
AMP
RD–
LIMITING
AMP
RD+ 5
PD
V
EER
1
0.01
µF
130
Ω
130
Ω
0.01
µF
100
Ω
RD+
TO TTL INPUT
SEE NOTE 2
RD–
PECL
INPUT
BUFFER
Figure 3. Example of TD+/- and RD+/- Termination
Notes:
1. Consult the serdes manufacturer for these resistor values because these values depend on the
serdes chip.
2. Consult the serdes manufacturer for the termination method.
5/7
模拟电子