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OLIMEXINO-NANO

Supercapacitors / Ultracapacitors 2.7V 10F

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厂商名称:Olimex

厂商官网:https://www.olimex.com

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器件参数
参数名称
属性值
产品种类
Product Category
Development Boards & Kits - AVR
制造商
Manufacturer
Olimex
RoHS
Details
产品
Product
Development Boards
Core
AVR
Description/Function
Open source hardware wearable Arduino Leonardo
用于
For Use With
Arduino
接口类型
Interface Type
USB
工作电源电压
Operating Supply Voltage
3.3 V, 5 V
系列
Packaging
Bulk
工厂包装数量
Factory Pack Quantity
25
文档预览
ATmega16U4/ATmega32U4
8-bit Microcontroller with 16/32K bytes of ISP Flash and
USB Controller
DATASHEET SUMMARY
Features
High Performance, Low Power AVR
®
8-Bit Microcontroller
Advanced RISC Architecture
– 135 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16MHz
– On-Chip 2-cycle Multiplier
Non-volatile Program and Data Memories
– 16/32KB of In-System Self-Programmable Flash
– 1.25/2.5KB Internal SRAM
– 512Bytes/1KB Internal EEPROM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85C/ 100 years at 25C
(1)
– Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Parts using external XTAL clock are pre-programed with a default USB bootloader
– Programming Lock for Software Security
JTAG (IEEE
®
std. 1149.1 compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
USB 2.0 Full-speed/Low Speed Device Module with Interrupt on Transfer Completion
– Complies fully with Universal Serial Bus Specification Rev 2.0
– Supports data transfer rates up to 12Mbit/s and 1.5Mbit/s
– Endpoint 0 for Control Transfers: up to 64-bytes
– Six Programmable Endpoints with IN or Out Directions and with Bulk, Interrupt or
Isochronous Transfers
– Configurable Endpoints size up to 256 bytes in double bank mode
– Fully independent 832 bytes USB DPRAM for endpoint memory allocation
– Suspend/Resume Interrupts
– CPU Reset possible on USB Bus Reset detection
– 48MHz from PLL for Full-speed Bus Operation
– USB Bus Connection/Disconnection on Microcontroller Request
– Crystal-less operation for Low Speed mode
Peripheral Features
– On-chip PLL for USB and High Speed Timer: 32 up to 96MHz operation
– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode
Atmel-7766JS-USB-ATmega16U4/32U4-Datasheet_04/2016
– Two 16-bit Timer/Counter with Separate Prescaler, Compare- and Capture Mode
– One 10-bit High-Speed Timer/Counter with PLL (64MHz) and Compare Mode
– Four 8-bit PWM Channels
– Four PWM Channels with Programmable Resolution from 2 to 16 Bits
– Six PWM Channels for High Speed Operation, with Programmable Resolution from 2 to 11 Bits
– Output Compare Modulator
– 12-channels, 10-bit ADC (features Differential Channels with Programmable Gain)
– Programmable Serial USART with Hardware Flow Control
– Master/Slave SPI Serial Interface
– Byte Oriented 2-wire Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– On-chip Temperature Sensor
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal 8MHz Calibrated Oscillator
– Internal clock prescaler and On-the-fly Clock Switching (Int RC / Ext Osc)
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby
I/O and Packages
– All I/O combine CMOS outputs and LVTTL inputs
– 26 Programmable I/O Lines
– 44-lead TQFP Package, 10x10mm
– 44-lead QFN Package, 7x7mm
Operating Voltages
– 2.7 - 5.5V
Operating temperature
– Industrial (-40°C to +85°C)
Maximum Frequency
– 8MHz at 2.7V - Industrial range
– 16MHz at 4.5V - Industrial range
1. See
“Data Retention” on page 8
for details.
Note:
2
ATmega16U4/32U4 [DATASHEET]
Atmel-7766JS-USB-ATmega16U4/32U4-Datasheet_04/2016
1.
Pin Configurations
Pinout
Figure 1-1.
PF6 (ADC6/TDO)
PF5 (ADC5/TMS)
PF4 (ADC4/TCK)
PF0 (ADC0)
PF1 (ADC1)
AREF
PF7 (ADC7/TDI)
AVCC
GND
GND
35
44
43
42
41
40
39
38
37
36
34
33 PE2 (HWB)
)
32 PC7 (ICP3/CLK0/OC4A
(
)
31 PC6 OC3A/OC4A
30 PB6 (PCINT6/OC1B/OC4B/ADC
29
PB5 (PCINT5/OC1A/OC4B/ADC
28 PB4 (PCINT4/ADC11)
T
27 PD7 ( 0/OC4D/ADC10)
T
26 PD6 ( 1/OC4D/ADC9)
25 PD4 (ICP1/ADC8)
24
23
AVCC
GND
(INT
.6/AIN0) PE6
UVcc
D-
D+
UGnd
UCap
VBus
(SS/PCINT0) PB0
(PCINT1/SCLK
) PB1
(PDI/PCINT2/MOSI) PB2
(PDO/PCINT3/MISO
) PB3
1
2
INDEX C RNER
O
3
4
5
6
7
8
9
10
11
ATmega32U4
ATmega16U4
44-pin QFN/T FP
Q
12
13
14
15
16
17
18
19
20
21
(TXD1/INT3) PD3
GND
VCC
XTAL2
XTAL1
(SDA/INT1) PD1
RESET
(RXD1/INT2) PD2
2.
Overview
The
ATmega16U4/ATmega32U4
is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the device achieves throughputs
approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing
speed.
(PCINT7/OC0A/OC1C/RTS) PB7
(OC0B/SCL/INT0) PD0
ATmega16U4/32U4 [DATASHEET ]
Atmel-7766JS-USB-ATmega16U4/32U4-Datasheet_04/2016
(XCK1/CTS) PD5
22
VCC
3
2.1
Block Diagram
Block Diagram
Figure 2-1.
PF7 - PF4
PF1 PF0
PC7 PC6
VCC
GND
PORTF DRIVERS
PORTC DRIVERS
DATA REGISTER
PORTF
DATA DIR.
REG. PORTF
DATA REGISTER
PORTC
8-BIT DA TA BUS
DATA DIR.
REG. PORTC
POR - BOD
RESET
INTERNAL
OSCILLATOR
CALIB. OSC
JTAG TAP
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
OSCILLATOR
ON-CHIP DEBUG
PROGRAM
FLASH
SRAM
MCU CONTROL
REGISTER
TIMERS/
COUNTERS
INTERRUPT
UNIT
TIMING AND
CONTROL
BOUNDARY-
SCAN
INSTRUCTION
REGISTER
GENERAL
PURPOSE
REGISTERS
X
Y
Z
RESET
XTAL1
XTAL2
UVcc
ON-CHIP
USB PAD 3V
REGULATOR
PROGRAMMING
LOGIC
INSTRUCTION
DECODER
EEPROM
UCap
1uF
TEMPERATURE
SENSOR
AVCC
AGND
AREF
ADC
CONTROL
LINES
ALU
HIGH SPEED
STATUS
REGISTER
TIMER/PWM
PLL
VBUS
DP
USB 2.0
DM
TWO-WIRE SERIAL
INTERFACE
ANALOG
COMPARATOR
USART1
SPI
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
PORTE DRIVERS
PORTB DRIVERS
PORTD DRIVERS
PE6
PE2
PB7 - PB0
PD7 - PD0
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are
directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one
single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
The device provides the following features: 16/32K bytes of In-System Programmable Flash with Read-While-
Write capabilities, 512Bytes/1K bytes EEPROM, 1.25/2.5K bytes SRAM, 26 general purpose I/O lines (CMOS
outputs and LVTTL inputs), 32 general purpose working registers, four flexible Timer/Counters with compare
modes and PWM, one more high-speed Timer/Counter with compare modes and PLL adjustable source, one
USART (including CTS/RTS flow control signals), a byte oriented 2-wire Serial Interface, a 12-channels 10-bit
ADC with optional differential input stage with programmable gain, an on-chip calibrated temperature sensor, a
programmable Watchdog Timer with Internal Oscillator, an SPI serial port, IEEE std. 1149.1 compliant JTAG
test interface, also used for accessing the On-chip Debug system and programming and six software selectable
4
ATmega16U4/32U4 [DATASHEET]
Atmel-7766JS-USB-ATmega16U4/32U4-Datasheet_04/2016
power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and
interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the
Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. The ADC Noise
Reduction mode stops the CPU and all I/O modules except ADC, to minimize switching noise during ADC
conversions. In Standby mode, the Crystal/Resonator Oscillator is running while the rest of the device is
sleeping. This allows very fast start-up combined with low power consumption.
The device is manufactured using the Atmel
®
high-density nonvolatile memory technology. The On-chip ISP
Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by a
conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core. The
boot program can use any interface to download the application program in the application Flash memory.
Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing
true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on
a monolithic chip, the device is a powerful microcontroller that provides a highly flexible and cost effective
solution to many embedded control applications.
The
ATmega16U4/ATmega32U4
AVR is supported with a full suite of program and system development tools
including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation
kits.
2.2
2.2.1
Pin Descriptions
VCC
Digital supply voltage.
2.2.2
GND
Ground.
2.2.3
Port B (PB7..PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output
buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
Port B has better driving capabilities than the other ports.
Port B also serves the functions of various special features of the device as listed on page 74.
2.2.4
Port C (PC7,PC6)
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output
buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
Only bits 6 and 7 are present on the product pinout.
Port C also serves the functions of special features of the device as listed on page 77.
2.2.5
Port D (PD7..PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output
buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
ATmega16U4/32U4 [DATASHEET ]
Atmel-7766JS-USB-ATmega16U4/32U4-Datasheet_04/2016
5
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