Ultralow Offset Voltage
Operational Amplifier
OP07
FEATURES
Low V
OS
: 75 μV maximum
Low V
OS
drift: 1.3 μV/°C maximum
Ultrastable vs. time: 1.5 μV per month maximum
Low noise: 0.6 μV p-p maximum
Wide input voltage range: ±14 V typical
Wide supply voltage range: 3 V to 18 V
125°C temperature-tested dice
PIN CONFIGURATION
V
OS
TRIM
–IN
+IN
V–
1
2
3
4
OP07
8
7
6
5
V
OS
TRIM
V+
OUT
00316-001
NC
NC = NO CONNECT
Figure 1.
APPLICATIONS
Wireless base station control circuits
Optical network control circuits
Instrumentation
Sensors and controls
Thermocouples
Resistor thermal detectors (RTDs)
Strain bridges
Shunt current measurements
Precision filters
GENERAL DESCRIPTION
The OP07 has very low input offset voltage (75 μV maximum for
OP07E) that is obtained by trimming at the wafer stage. These
low offset voltages generally eliminate any need for external
nulling. The OP07 also features low input bias current (±4 nA for
the OP07E) and high open-loop gain (200 V/mV for the OP07E).
The low offset and high open-loop gain make the OP07
particularly useful for high gain instrumentation applications.
The wide input voltage range of ±13 V minimum combined
with a high CMRR of 106 dB (OP07E) and high input
impedance provide high accuracy in the noninverting circuit
configuration. Excellent linearity and gain accuracy can be
maintained even at high closed-loop gains. Stability of offsets
and gain with time or variations in temperature is excellent. The
accuracy and stability of the OP07, even at high gain, combined
with the freedom from external nulling have made the OP07 an
industry standard for instrumentation applications.
The OP07 is available in two standard performance grades. The
OP07E is specified for operation over the 0°C to 70°C range,
and the OP07C is specified over the −40°C to +85°C
temperature range.
The OP07 is available in epoxy 8-lead PDIP and 8-lead narrow
SOIC packages. For CERDIP and TO-99 packages and standard
microcircuit drawing (SMD) versions, see the OP77.
V+
7
R2A
1
R1A
1
R2B
1
(OPTIONAL
NULL)
C1
8
R1B
Q19
Q9
Q7
NONINVERTING
INPUT 3
INVERTING
INPUT
R3
Q5
Q3
Q1
Q21
R4
2
4
V–
1
R2A AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY FOR MINIMUM INPUT OFFSET VOLTAGE.
R7
Q10
Q11
Q12
C2
Q17
R9
OUT
6
Q16
Q15
R10
Q20
Q8
Q6
Q4
Q27
C3
R5
Q26
Q2
Q25
Q23
Q24
Q22
Q14
Q13
R6
Q18
R8
00316-002
Figure 2. Simplified Schematic
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2006-2009 Analog Devices, Inc. All rights reserved.
OP07
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Configuration ............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
OP07E Electrical Characteristics ............................................... 3
OP07C Electrical Characteristics ............................................... 4
Absolute Maximum Ratings ............................................................6
Thermal Resistance .......................................................................6
ESD Caution...................................................................................6
Typical Performance Characteristics ..............................................7
Typical Applications ....................................................................... 11
Applications Information .......................................................... 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 14
REVISION HISTORY
7/09—Rev. D. to Rev E
Changes to Figure 29 Caption....................................................... 11
Changes to Ordering Guide .......................................................... 14
7/06—Rev. C. to Rev D
Changes to Features.......................................................................... 1
Changes to General Description .................................................... 1
Changes to Specifications Section .................................................. 3
Changes to Table 4 ............................................................................ 6
Changes to Figure 6 and Figure 8 ................................................... 7
Changes to Figure 13 and Figure 14 ............................................... 8
Changes to Figure 20 ........................................................................ 9
Changes to Figure 21 to Figure 25 ................................................ 10
Changes to Figure 26 and Figure 30 ............................................. 11
Replaced Figure 28 ......................................................................... 11
Changes to Applications Information Section............................ 12
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
8/03—Rev. B to Rev. C
Changes to OP07E Electrical Specifications ..................................2
Changes to OP07C Electrical Specifications .................................3
Edits to Ordering Guide ...................................................................5
Edits to Figure 6 .................................................................................9
Updated Outline Dimensions ....................................................... 11
3/03—Rev. A to Rev. B
Updated Package Titles ...................................................... Universal
Updated Outline Dimensions ....................................................... 11
2/02—Rev. 0 to Rev. A
Edits to Features.................................................................................1
Edits to Ordering Guide ...................................................................1
Edits to Pin Connection Drawings .................................................1
Edits to Absolute Maximum Ratings ..............................................2
Deleted Electrical Characteristics .............................................. 2–3
Deleted OP07D Column from Electrical Characteristics ....... 4–5
Edits to TPCs ................................................................................ 7–9
Edits to High-Speed, Low V
OS
Composite Amplifier ...................9
Rev. E | Page 2 of 16
OP07
SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS
V
S
= ±15 V, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
T
A
= 25°C
Input Offset Voltage
1
Long-Term V
OS
Stability
2
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
Symbol
Conditions
Min
Typ
Max
Unit
V
OS
V
OS
/Time
I
OS
I
B
e
n
p-p
e
n
0.1 Hz to 10 Hz
3
f
O
= 10 Hz
f
O
= 100 Hz
3
f
O
= 1 kHz
f
O
= 10 Hz
f
O
= 100 Hz
3
f
O
= 1 kHz
15
±13
106
200
150
Input Noise Current
Input Noise Current Density
I
n
p-p
I
n
Input Resistance, Differential Mode
4
Input Resistance, Common Mode
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
0°C ≤ T
A
≤ 70°C
Input Offset Voltage
1
Voltage Drift Without External Trim
4
Voltage Drift with External Trim
3
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Bias Current Drift
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
OUTPUT CHARACTERISTICS
T
A
= 25°C
Output Voltage Swing
R
IN
R
INCM
IVR
CMRR
PSRR
A
VO
V
CM
= ±13 V
V
S
= ±3 V to ±18 V
R
L
≥ 2 kΩ, V
O
= ±10 V
R
L
≥ 500 Ω, V
O
= ±0.5 V, V
S
= ±3 V
4
30
0.3
0.5
±1.2
0.35
10.3
10.0
9.6
14
0.32
0.14
0.12
50
160
±14
123
5
500
400
45
0.3
0.3
0.9
8
±1.5
13
±13.5
123
7
450
75
1.5
3.8
±4.0
0.6
18.0
13.0
11.0
30
0.80
0.23
0.17
20
μV
μV/Month
nA
nA
μV p-p
nV/√Hz
nV/√Hz
nV/√Hz
pA p-p
pA/√Hz
pA/√Hz
pA/√Hz
MΩ
GΩ
V
dB
μV/V
V/mV
V/mV
μV
μV/°C
μV/°C
nA
pA/°C
nA
pA/°C
V
dB
μV/V
V/mV
V
OS
TCV
OS
TCV
OSN
I
OS
TCI
OS
I
B
TCI
B
IVR
CMRR
PSRR
A
VO
R
P
= 20 kΩ
130
1.3
1.3
5.3
35
±5.5
35
V
CM
= ±13 V
V
S
= ±3 V to ±18 V
R
L
≥ 2 kΩ, V
O
= ±10 V
±13
103
180
32
V
O
R
L
≥ 10 kΩ
R
L
≥ 2 kΩ
R
L
≥ 1 kΩ
R
L
≥ 2 kΩ
±12.5
±12.0
±10.5
±12
±13.0
±12.8
±12.0
±12.6
V
V
V
V
0°C ≤ T
A
≤ 70°C
Output Voltage Swing
V
O
Rev. E | Page 3 of 16
OP07
Parameter
DYNAMIC PERFORMANCE
T
A
= 25°C
Slew Rate
Closed-Loop Bandwidth
Open-Loop Output Resistance
Power Consumption
Offset Adjustment Range
1
2
Symbol
Conditions
Min
Typ
Max
Unit
SR
BW
R
O
P
d
R
L
≥ 2 kΩ
3
A
VOL
= 1
5
V
O
= 0, I
O
= 0
V
S
= ±15 V, No load
V
S
= ±3 V, No load
R
P
= 20 kΩ
0.1
0.4
0.3
0.6
60
75
4
±4
120
6
V/μs
MHz
Ω
mW
mW
mV
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
Long-term input offset voltage stability refers to the averaged trend time of V
OS
vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in V
OS
during the first 30 operating days are typically 2.5 μV. Refer to the Typical Performance Characteristics section. Parameter is
sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
OP07C ELECTRICAL CHARACTERISTICS
V
S
= ±15 V, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
T
A
= 25°C
Input Offset Voltage
1
Long-Term V
OS
Stability
2
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
Symbol
Conditions
Min
Typ
Max
Unit
V
OS
V
OS
/Time
I
OS
I
B
e
n
p-p
e
n
0.1 Hz to 10 Hz
3
f
O
= 10 Hz
f
O
= 100 Hz
3
f
O
= 1 kHz
f
O
= 10 Hz
f
O
= 100 Hz
3
f
O
= 1 kHz
8
±13
100
120
100
Input Noise Current
Input Noise Current Density
I
n
p-p
I
n
Input Resistance, Differential Mode
4
Input Resistance, Common Mode
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
−40°C ≤ T
A
≤ +85°C
Input Offset Voltage
1
Voltage Drift Without External Trim
4
Voltage Drift with External Trim
3
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Bias Current Drift
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
R
IN
R
INCM
IVR
CMRR
PSRR
A
VO
V
CM
= ±13 V
V
S
= ±3 V to ±18 V
R
L
≥ 2 kΩ, V
O
= ±10 V
R
L
≥ 500 Ω, V
O
= ±0.5 V, V
S
= ±3 V
4
60
0.4
0.8
±1.8
0.38
10.5
10.2
9.8
15
0.35
0.15
0.13
33
120
±14
120
7
400
400
85
0.5
0.4
1.6
12
±2.2
18
±13.5
120
10
400
150
2.0
6.0
±7.0
0.65
20.0
13.5
11.5
35
0.90
0.27
0.18
32
μV
μV/Month
nA
nA
μV p-p
nV/√Hz
nV/√Hz
nV/√Hz
pA p-p
pA/√Hz
pA/√Hz
pA/√Hz
MΩ
GΩ
V
dB
μV/V
V/mV
V/mV
μV
μV/°C
μV/°C
nA
pA/°C
nA
pA/°C
V
dB
μV/V
V/mV
V
OS
TCV
OS
TCV
OSN
I
OS
TCI
OS
I
B
TCI
B
IVR
CMRR
PSRR
A
VO
R
P
= 20 kΩ
250
1.8
1.6
8.0
50
±9.0
50
V
CM
= ±13 V
V
S
= ±3 V to ±18 V
R
L
≥ 2 kΩ, V
O
= ±10 V
Rev. E | Page 4 of 16
±13
97
100
51
OP07
Parameter
OUTPUT CHARACTERISTICS
T
A
= 25°C
Output Voltage Swing
Symbol
Conditions
Min
Typ
Max
Unit
V
O
R
L
≥ 10 kΩ
R
L
≥ 2 kΩ
R
L
≥ 1 kΩ
R
L
≥ 2 kΩ
±12.0
±11.5
±13.0
±12.8
±12.0
±12.6
V
V
V
V
−40°C ≤ T
A
≤ +85°C
Output Voltage Swing
DYNAMIC PERFORMANCE
T
A
= 25°C
Slew Rate
Closed-Loop Bandwidth
Open-Loop Output Resistance
Power Consumption
Offset Adjustment Range
1
2
V
O
±12
SR
BW
R
O
P
d
R
L
≥ 2 kΩ
3
A
VOL
= 1
5
V
O
= 0, I
O
= 0
V
S
= ±15 V, No load
V
S
= ±3 V, No load
R
P
= 20 kΩ
0.1
0.4
0.3
0.6
60
80
4
±4
150
8
V/μs
MHz
Ω
mW
mW
mV
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
Long-term input offset voltage stability refers to the averaged trend time of V
OS
vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in V
OS
during the first 30 operating days are typically 2.5 μV. Refer to the Typical Performance Characteristics section. Parameter is
sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
Rev. E | Page 5 of 16
