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Data Sheet
FEATURES
Low input offset voltage: 150 µV maximum
Low offset voltage drift over –55°C to +125°C: 1.2 μV/°C
maximum
Low supply current (per amplifier): 725 µA maximum
High open-loop gain: 5000 V/mV minimum
Input bias current: 3 nA maximum
Low noise voltage density: 11 nV/√Hz at 1 kHz
Stable with large capacitive loads: 10 nF typical
Available in die form
Quad Low Offset, Low Power
Operational Amplifier
OP400
FUNCTIONAL BLOCK DIAGRAMS
OUTA
1
OUT A
1
–IN A
2
+IN A
3
V+
4
+IN B
5
–IN B
6
OUT B
7
–
+
+
–
–
+
+
–
16
OUT D
–
+
+
–
14
13
12
OUT D
–IN D
+IN D
V–
+IN C
00304-001
–IN A
2
+IN A
3
V+
4
+IN B
5
–IN B
6
OUT B
7
NC
8
15
–IN D
14
+IN D
OP400
–
+
+
–
13
V–
12
+IN C
11
–IN C
10
OUT C
00304-002
OP400
11
10
9
8
–IN C
OUT C
9
NC
NC = NO CONNECT
Figure 1. 14-Pin Ceramic DIP (Y-Suffix)
and 14-Pin Plastic DIP (P-Suffix)
Figure 2. 16-Pin SOIC (S-Suffix)
GENERAL DESCRIPTION
The OP400 is the first monolithic quad operational amplifier
that features OP77-type performance. Precision performance is
not sacrificed with the OP400 to obtain the space and cost
savings offered by quad amplifiers.
The OP400 features an extremely low input offset voltage of less
than 150 µV with a drift of less than 1.2 µV/°C, guaranteed over
the full military temperature range. Open-loop gain of the
OP400 is more than 5 million into a 10 kΩ load, input bias
current is less than 3 nA, CMR is more than 120 dB, and PSRR
is less than 1.8 µV/V. On-chip Zener zap trimming is used to
achieve the low input offset voltage of the OP400 and eliminates
the need for offset nulling. The OP400 conforms to the industry-
standard quad pinout, which does not have null terminals.
The OP400 features low power consumption, drawing less than
725 µA per amplifier. The total current drawn by this quad
amplifier is less than that of a single OP07, yet the OP400 offers
significant improvements over this industry-standard op amp.
Voltage noise density of the OP400 is a low 11 nV/√Hz at
10 Hz, half that of most competitive devices.
The OP400 is an ideal choice for applications requiring multiple
precision operational amplifiers and where low power
consumption is critical.
V+
BIAS
VOLTAGE
LIMITING
NETWORK
+IN
–IN
OUT
V–
00304-003
Figure 3. Simplified Schematic (One of Four Amplifiers Is Shown)
Rev. H
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Trademarks and registered trademarks are the property of their respective owners.
OP400
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Data Sheet
Typical Performance Characteristics ..............................................6
Applications..................................................................................... 11
Dual Low Power Instrumentation Amplifier ......................... 11
Bipolar Current Transmitter ..................................................... 12
Differential Output Instrumentation Amplifier .................... 12
Multiple Output Tracking Voltage Reference ......................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 15
SMD Parts and Equivalents ...................................................... 15
REVISION HISTORY
1/13—Rev. G to Rev. H
Changes to Features Section and General Description Section........ 1
Changes to Ordering Guide ...........................................................15
2/11—Rev. F to Rev. G
Added S Package to Storage Temperature Range in Table 4 ....... 5
Updated Outline Dimensions ....................................................... 15
12/08—Rev. E to Rev. F
Added New Figure 28, Renumbered Sequentially ..................... 10
Updated Outline Dimensions ....................................................... 15
1/07—Rev. D to Rev. E
Updated Format .................................................................. Universal
Changes to Figure 1 and Figure 2 ................................................... 1
Removed Figure 4 ............................................................................. 4
Changes to Table 3 ............................................................................ 4
Changes to Figure 16 through Figure 19, Figure 21 .................... 8
Changes to Figure 27 ........................................................................ 9
Changes to Figure 28 ...................................................................... 10
Changes to Figure 33 ...................................................................... 13
Updated Outline Dimensions ....................................................... 14
3/06—Rev. C to Rev. D
Updated Format .................................................................. Universal
Deleted Wafer Test Limits Table ..................................................... 4
New Package Drawing: R-14 ......................................................... 15
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 16
6/03—Rev. B to Rev. C
Edits to Specifications .......................................................................2
10/02—Rev. A to Rev. B
Addition of Absolute Maximum Ratings .......................................5
Edits to Outline Dimensions......................................................... 12
4/02—Rev. 0 to Rev. A
Edits to Features.................................................................................1
Edits to Ordering Information ........................................................1
Edits to Pin Connections ..................................................................1
Edits to General Descriptions ..................................................... 1, 2
Edits to Package Type .......................................................................2
Rev. H | Page 2 of 16
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ V
S
= ±15 V, T
A
= +25°C, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Input Offset Voltage
Long-Term Input
Voltage Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Resistance
Differential Mode
Input Resistance
Common Mode
Large Signal Voltage
Gain
Symbol
V
OS
Conditions
OP400A/E
Min Typ
Max
40
0.1
V
CM
= 0 V
V
CM
= 0 V
0.1 Hz to 10 Hz
0.1
0.75
0.5
10
200
V
O
= ±10 V
R
L
= 10 kΩ
R
L
= 2 kΩ
Input Voltage Range
1
Common-Mode
Rejection
Input Capacitance
OUTPUT
CHARACTERISTICS
Output Voltage Swing
POWER SUPPLY
Power Supply Rejection
Ratio
Supply Current per
Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth
Product
Channel Separation
Capacitive Load
Stability
NOISE PERFORMANCE
Input Noise Voltage
Density
3
Input Noise Current
Input Noise Current
Density
Guaranteed by CMR test.
Guaranteed but not 100% tested.
3
Sample tested.
1
2
OP400
Min
OP400F
Typ
Max
60
0.1
0.1
0.75
0.5
10
200
230
OP400G/H
Min
Typ
Max
80
0.1
0.1
0.75
0.5
10
200
300
Unit
µV
µV/mo
nA
nA
µV p-p
MΩ
GΩ
150
I
OS
I
B
e
n p-p
R
IN
R
INCM
A
VO
1.0
3.0
2.0
6.0
3.5
7.0
IVR
CMR
C
IN
V
CM
= 12 V
5000 12,000
2000 3500
±12
±13
120
140
3.2
3000
1500
±12
115
7000
3000
±13
140
3.2
3000
1500
±12
110
7000
3000
±13
135
3.2
V/mV
V/mV
V
dB
pF
V
O
PSRR
I
SY
R
L
= 10 kΩ
V
S
= 3 V to 18 V
No load
±12
±12.6
0.1
600
1.8
725
±12
±12.6
0.1
600
3.2
725
±12
±12.6
0.2
600
5.6
725
V
µV/V
µA
SR
GBWP
CS
0.1
A
V
= 1
V
O
= 20 V p-p,
f
O
= 10 Hz
2
A
V
= 1,
no oscillations
f
O
= 10 Hz
3
f
O
= 1000 Hz
3
0.1 Hz to 10 Hz
f
O
= 10 Hz
123
0.15
500
135
10
0.1
0.15
500
135
10
0.1
0.15
500
135
10
V/µs
kHz
dB
nF
123
123
e
n
i
n p-p
i
n
22
11
15
0.6
36
18
22
11
15
0.6
36
18
22
11
15
0.6
nV/√Hz
nV/√Hz
pA p-p
pA/√Hz
Rev. H | Page 3 of 16
OP400
@ V
S
= ±15 V, −55°C ≤ T
A
≤ +125°C for OP400A, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Input Offset Voltage
Average Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
Input Voltage Range
1
Common-Mode Rejection
OUTPUT CHARACTERISTICS
Output Voltage Swing
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Capacitive Load Stability
1
Data Sheet
Symbol
V
OS
TCV
OS
I
OS
I
B
A
VO
IVR
CMR
V
O
PSRR
I
SY
Conditions
Min
Typ
70
0.3
0.1
1.3
9000
2300
±12.5
115
±12.4
0.2
600
8
Max
270
1.2
2.5
5.0
Unit
µV
µV/°C
nA
nA
V/mV
V
dB
V
CM
= 0 V
V
CM
= 0 V
V
O
= ±10 V, R
L
= 10 kΩ
R
L
= 2 kΩ
V
CM
= ±12 V
R
L
= 10 kΩ
V
O
= 3 V to 18 V
No load
A
V
= 1, no oscillations
3000
1000
±12
130
±12
3.2
775
µV/V
µA
nF
Guaranteed by CMR test.
@ V
S
= ±15 V, −25°C ≤ T
A
≤ +85°C for OP400E/F, 0°C ≤ T
A
≤ 70°C for OP400G, −40°C ≤ T
A
≤ +85°C for OP400H, unless otherwise noted.
Table 3.
Parameter
INPUT CHARACTERISTICS
Input Offset Voltage
Average Input Offset
Voltage Drift
Input Offset Current
Symbol
V
OS
TCV
OS
I
OS
V
CM
= 0 V
E, F, G grades
H grade
V
CM
= 0 V
E, F, G grades
H grade
V
CM
= 0 V
R
L
= 10 kΩ
R
L
= 2 kΩ
V
CM
= ±12 V
R
L
= 10 kΩ
R
L
= 2 kΩ
V
S
= ±3 V to
±18 V
No load
Conditions
Min
OP400E
Typ
Max
60
0.3
220
1.2
OP400F
Min
Typ
Max
80
0.3
350
2.0
OP400G/H
Min
Typ
Max
110
0.6
400
2.5
Unit
µV
µV/°C
0.1
2.5
0.1
3.5
0.2
0.2
1.0
1.0
2000
1000
±12
105
±12
±11
5000
2000
±12.5
130
±12.6
±12.2
0.3
600
6.0
12.0
12.0
20.0
nA
nA
nA
nA
V/mV
V/mV
V
dB
V
V
Input Bias Current
I
B
0.9
5.0
0.9
10.0
Large-Signal Voltage Gain
A
VO
Input Voltage Range
1
Common-Mode Rejection
OUTPUT CHARACTERISTICS
Output Voltage Swing
POWER SUPPLY
Power Supply Rejection
Ratio
Supply Current per
Amplifier
DYNAMIC PERFORMANCE
Capacitive Load Stability
1
IVR
CMR
V
O
3000
1500
±12
115
±12
±11
10,000
2700
±12.5
135
±12.4
±12
0.15
600
3.2
775
2000
1000
±12
110
±12
±11
5000
2000
±12.5
135
±12.4
±12
0.15
600
5.6
775
PSRR
I
SY
10.0
775
µV/V
µA
No oscillations
10
10
10
nF
Guaranteed by CMR test.
Rev. H | Page 4 of 16
