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OPA256C-1

描述:
Position Sensor
分类:
文件大小:
149KB,共10页
制造商:
概述
Position Sensor
器件参数
参数名称
属性值
厂商名称
LAPIS Semiconductor Co Ltd
包装说明
,
Reach Compliance Code
unknown
模拟集成电路 - 其他类型
POSITION SENSOR
最大供电电压 (Vsup)
16 V
表面贴装
NO
文档预览
E2P0059-37-X2
IMAGE SENSORS
This version: Jan. 1998
Previous version: May. 1997
OPA256C–1
¡ electronic components
OPA256C–1
Self-Scanning Line Sensor
GENERAL DESCRIPTION
The OPA256C-1 is a 256-bit, one-dimensional diode array comprised of PN junction photodetector
diodes and CCDs (charge coupled devices). By using a two-phase clock pulse, transfer pulse,
and reset pulse, the OPA256C-1 can measure incident light.
FEATURES
• CCD for high sensitivity
• CCD transfer efficiency greater than 99.995%
• Photodetector configured of PN junction photodetector diodes for good blue sensitivity and
good output uniformity.
• Photodiodes highly integrated with 13
µm
pitch for high resolution
• High-speed scanning
• Low-voltage operation
• Internal output amplifier and compensating amplifier
APPLICATIONS
Industrial control
Pattern recognition
Control devices
Object detection
PIN CONFIGURATION
• Dimensions
22.86±0.3
18 17 16 15 14 13 12 11 10
7.36±0.2
(Unit: mm)
*
0.4
1
2
3
4
5
6
1st Bit
7
8
9
1.1±0.2
0.51min.
* 9.8±0.6
2.5±0.35
*
5.0min.
0.46
2.54
20.32±0.25
0.25
7.62
* : Indicates photodetector
location
2.4±0.2
1/10
IMAGE SENSORS
• Pin Connection Block Diagram
CS
18
OS
17
0D
16
f2B
15
f1B
14
fT
13
TP
1
12
TP
2
11
PG
10
OPA256C–1
BCCD analog shift register
Transfer gate
Photo-gate
1 2 Photodiodes F255 256
Photo-gate
Transfer gate
BCCD analog shift register
1
RD
2
fR
3
OG
4
f2A
5
f1A
6
fT
7
TP
3
8
TP
4
9
V
SS
SS
Compensating
preamplifier
Preamplifier
Output gate
Symbol
RD
fR
OG
f1A
f1B
f2A
f2B
fT
Name
Reset transistor drain
Reset transistor gate clock
Output gate
CCD register clock
CCD register clock
CCD register clock
CCD register clock
Phototransfer gate clock
Symbol
TP
1
TP
2
TP
3
TP
4
V
SS
PG
OD
OS
CS
Name
Test pin (electrical input gate)
Test pin (electrical input diode)
Test pin (electrical input gate)
Test pin (electrical input diode)
Substrate bias
Photo-gate
Output transistor drain
Output transistor source (video output)
Compensating transistor source (noise output)
2/10
IMAGE SENSORS
OPA256C–1
ABSOLUTE MAXIMUM RATINGS
Parameter
Storage Temperature
Operating Temperature
Clock Voltage
Applied Voltage
Symbol
T
stg
T
op
Vf
V
DD
Test Condition
‚—
Ta=25°C
Min.
–40
–20
–0.3
–0.3
Max.
+125
+85
+18
+18
Unit
°C
°C
V
V
ELECTRICAL CHARACTERISTICS
Parameter
Reset Drain Voltage
Output Transistor Drain Voltage
Output Gate Voltage
Photo Gate Voltage
Substrate Bias
Electrical Input Diode Voltage (TP
2, 4
)
Electrical Input Gate Voltage (TP
1, 3
)
"H"
CCD register
"L"
"H"
Photo-transfer
Reset
"L"
"H"
"L"
Symbol
V
DD
V
OG
V
PG
V
SS
V
IS
V
IG
AB
Vf
1, 2
H
AB
Vf
1, 2
L
AB
Vf
1, 2
(Ambient Temperature Ta=25°C)
Min.
11.4
11.4
4.75
4.75
–1.5
11.4
–0.1
7
0
7
0
7
0
0.1
Typ.
12
12
5
5
–2.0
12
0
V
DD
0.4
V
DD
0.4
V
DD
0.4
80
10
4
80
1
Max.
12.6
12.6
5.25
5.25
–2.5
12.6
0.2
V
DD
0.8
V
DD
0.8
V
DD
0.8
4
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
MH
Z
pF
pF
pF
mW
kW
V
OD
V
RD
Clock Pulse Voltage
VfTL
VfRH
VfRL
f
V
Cf
AB
1, 2
Video Frequency
Clock Input
Capacitance
CCD register
Photo-transfer
Reset
Cf
T
Cf
R
P
D
R
L
Power Dissipation
Output Load Resistance
3/10
IMAGE SENSORS
OPA256C–1
POTOELECTRIC CHARACTERISTICS
Parameter
Sensitivity
Saturation Output Voltage
Output Uniformity <*007*> (Overall)
Output DC Level
Dark Output Voltage
*1 2856K tungsten lamp
*2 V
RD
, V
DD
=12 V, V
SS
=2.0 V, R
L
=1 kW
*3 When it is 50 percent of the saturation output (2856K tungsten lamp.)
However, this excludes the 1st, 2nd, and 256th bits
*4 Storage time is assumed to be 10 ms.
Symbol
R
W
Vsat
U
Vdc
Vd
Min.
180
Typ.
1500
250
4.0
Max.
±7
4
(Ambient Temperature Ta=25°C)
Unit
mV/ x • sec
R
mV
%
V
mV
Note
*1
*2
*3
*4
PIXEL CONFIGURATION
Parameter
Arrangement
Number of Pixels
Pixels Pitch
Photodiode Width
Aperture Width
Sensor Length
Symbol
P
D
L
Central Value
Straight line
256
13
8
18
(Ambient Temperature Ta=25°C)
Accuracy
—-
±2.0
±2.0
±2.5
Unit
mm
mm
mm
mm
* See output timing for information concerning dummy pixels.
Pixcel Configration Diagram
W


,,



W
3328
±3.0
QQ
,,
QQ
,,
QQ
,,
QQ
,,
QQ
Q
,,
,
QQ
,,
QQ Q
,, ,
Q
,
D
P
Light shield layer
(Al)
Photodiode D
QQ QQ
,, ,,
Q
,
L
4/10
IMAGE SENSORS
OPA256C–1
CLOCK INPUT TIMING CHARACTERISTICS
(Ambient Temperature Ta=25°C)
Parameter
Rise time
Register
Fall time
Overlap time
Blank time
Rise time
Fall time
Phototransfer Transfer time duration
Setup time
Hold time
Rise time
Fall time
Reset
Duration
Setup time
Hold time
Symbol
t
r
f
t
f
f
t
O
f1,
2
t
B
f1,
2
t
r
fT
t
f
fT
t
W
fr
t
S
fT
t
H
fT
t
r
fR
t
r
fR
t
W
fR
t
S
fR
t
H
fR
Min.
0
5
0
0
80
170
0
Typ.
30
20
20
20
30
20
10
1
1
30
20
Max.
100
100
100
100
100
100
15
10
10
100
100
2000
2000
2000
Unit
ns
ns
ns
ns
ns
ns
ms
ms
ms
ns
ns
ns
ns
ns
*5
*4
Note
*1
*2
*3
OPA256C–1 Input Timing Diagrams
*1
f1
AB
or
f2
AB
trf
90%
f2
AB
or
f1
AB
100%
tff
*2
fA2
or
fB1
1
V
2
OG
fA1
or
fB2
to
f1,
2
Limited to periods during
fA1
rise and
fA2
fall, and
fB2
rise and
fB1
fall.
5/10
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