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P4C107-20J4I

ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM

器件类别：存储    存储   

厂商名称：Pyramid Semiconductor Corporation

厂商官网：http://www.pyramidsemiconductor.com/

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参数 预览 参数对比
器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
Pyramid Semiconductor Corporation
零件包装代码
SOJ
包装说明
SOJ,
针数
28
Reach Compliance Code
compli
ECCN代码
3A991.B.2.B
最长访问时间
20 ns
JESD-30 代码
R-PDSO-J28
JESD-609代码
e0
长度
18.415 mm
内存密度
1048576 bi
内存集成电路类型
STANDARD SRAM
内存宽度
1
功能数量
1
端子数量
28
字数
1048576 words
字数代码
1000000
工作模式
ASYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-40 °C
组织
1MX1
封装主体材料
PLASTIC/EPOXY
封装代码
SOJ
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
并行/串行
PARALLEL
峰值回流温度（摄氏度）
NOT SPECIFIED
认证状态
Not Qualified
座面最大高度
3.7592 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
TIN LEAD
端子形式
J BEND
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
10.16 mm
Base Number Matches
1
文档预览
P4C107
ULTRA HIGH SPEED 1M x 1
STATIC CMOS RAM
FEATURES
Full CMOS
High Speed (Equal Access and Cycle Times)
– 10/12/15 ns (Commercial)
– 12/15/20 ns (Industrial)
Single 5V±10% Power Supply
Separate Data I/O
Three-State Output
Fully TTL Compatible Inputs and Outputs
Standard Pinout (JEDEC Approved)
– 28-Pin 400 mil SOJ
DESCRIPTIOn
The P4C107 is a 1Mx1-bit ultra high-speed static RAM.
The CMOS memories require no clocks or refreshing and
have equal access and cycle times. The RAM operates
from a single 5V ± 10% tolerance power supply. Data
integrity is maintained for supply voltages down to 2.0V,
typically drawing 50µA.
Access times as fast as 10 nanoseconds are available,
greatly enhancing system speeds.
The P4C107 is available in a 28-pin 400 mil SOJ.
FUnCTIOnAL BLOCk DIAgRAM
PIn COnFIgURATIOn
SOJ (J7)
Document #
SRAM139
REV OR
Revised April 2010
P4C107 - ULTRA HIGH SPEED 1M X 1 STATIC CMOS RAM
MAxIMUM RATIngS
(1)
Sym
V
CC
V
TERM
T
A
T
BIAS
T
STG
P
T
I
OUT
Parameter
Power Supply Pin with
Respect to GND
Terminal Voltage with
Respect to GND (up to
6.0V)
Operating Temperature
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
Value
-0.5 to +6
-0.5 to V
CC
+ 0.5
-55 to +125
-55 to +125
-65 to +150
1.0
50
Unit
V
V
°C
°C
°C
W
mA
RECOMMEnDED OPERATIng COnDITIOnS
grade
(2)
Commercial
Industrial
Ambient Temp
0°C to +70°C
-40°C to +85°C
gnD
0V
0V
V
CC
5.0V ± 10%
5.0V ± 10%
CAPACITAnCES
(4)
Sym
C
IN
C
OUT
Parameter
(V
CC
= 5.0V, T
A
= 25°C, f = 1.0MHz)
Conditions
V
IN
=0V
V
OUT
=0V
Typ
7
10
Unit
pF
pF
Input Capacitance
Output Capacitance
DC ELECTRICAL CHARACTERISTICS
Sym Parameter
V
IH
V
IL
V
OL
V
OH
I
LI
I
LO
I
CC
I
SB
Input High Voltage
Input Low Voltage
Output Low Voltage (TTL
Load)
Output High Voltage (TTL
Load)
Input Leakage Current
Output Leakage Current
Operating Supply Current
Standby Power Supply
Current (TTL Input Levels)
Standby Power Supply
Current (CMOS Input
Levels)
(Over Recommended Operating Temperature & Supply Voltage)
(2)
Test Conditions
Min
2.2
-0.5
(3)
I
OL
= +8 mA, V
CC
= Min
I
OH
= -4 mA, V
CC
= Min
V
CC
= Max,
V
IN
= GND to V
CC
V
CC
= Max,
CE
= V
IH
,
V
OUT
= GND to V
CC
V
CC
= Max, I
OUT
=0 mA, f=Max
CE
≥ V
IH
, V
CC
= Max, f = Max,
Outputs Open
CE
≥ V
HC
, V
CC
= Max, f = 0,
Outputs Open
V
IN
≤ V
LC
or V
IN
≥ V
HC
2.4
-5
-5
+5
+5
150
50
Max
V
CC
+ 0.5
0.8
0.4
Unit
V
V
V
V
µA
µA
mA
mA
I
SB1
3
mA
N/A = Not applicable
Document #
SRAM139
REV OR
Page 2
P4C107 - ULTRA HIGH SPEED 1M X 1 STATIC CMOS RAM
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym Parameter
t
RC
t
AA
t
AC
t
OH
t
LZ
t
HZ
t
PU
t
PD
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Hold from Address Change
Chip Enable to Output in Low Z
Chip Disable to Output in High Z
Chip Enable to Power Up Time
Chip Disable to Power Down
0
10
3
3
5
0
12
-10
Min
10
10
10
3
3
6
0
15
Max
Min
12
12
12
3
3
7
0
20
-12
Max
Min
15
15
15
3
3
8
-15
Max
Min
20
20
20
-20
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
TIMIng WAVEFORM OF READ CYCLE nO. 1 (ADDRESS COnTROLLED)
(5,6)
TIMIng WAVEFORM OF READ CYCLE nO. 2 (CE COnTROLLED)
(5,7,8)
Document #
SRAM139
REV OR
Page 3
P4C107 - ULTRA HIGH SPEED 1M X 1 STATIC CMOS RAM
AC CHARACTERISTICS—WRITE CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym Parameter
t
WC
t
CW
t
AW
t
AS
t
WP
t
AH
t
DW
t
DH
t
WZ
t
OW
Write Cycle Time
Chip Enable Time to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Address Hold Time
Data Valid to End of Write
Data Hold Time
Write Enable to Output in High Z
Output Active from End of Write
0
-10
Min
10
7
7
0
7
0
6
0
6
0
Max
Min
12
10
10
0
10
0
7
0
7
0
-12
Max
Min
15
12
12
0
12
0
8
0
8
0
-15
Max
Min
20
15
15
0
15
0
10
0
9
-20
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMIng WAVEFORM OF WRITE CYCLE nO. 1 (WE COnTROLLED)
(10,11)
notes:
1. Stresses greater than those listed under MAxIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAxIMUM rating conditions for extended
periods may affect reliability.
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with V
IL
and I
IL
not more negative than –3.0V and
–100mA, respectively, are permissible for pulse widths up to 20 ns.
4. This parameter is sampled and not 100% tested.
5.
WE
is HIGH for READ cycle.
6.
CE
is LOW and
OE
is LOW for READ cycle.
7. ADDRESS must be valid prior to, or coincident with
CE
transition
LOW.
8. Transition is measured ± 200 mV from steady state voltage prior to
change, with loading as specified in Figure 1. This parameter is sampled
and not 100% tested.
9. Read Cycle Time is measured from the last valid address to the first
transitioning address.
Document #
SRAM139
REV OR
Page 4
P4C107 - ULTRA HIGH SPEED 1M X 1 STATIC CMOS RAM
TIMIng WAVEFORM OF WRITE CYCLE nO. 2 (CE COnTROLLED)
(10)
AC TEST COnDITIOnS
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Level
Output Timing Reference Level
Output Load
GND to 3.0V
3ns
1.5V
1.5V
See Figures 1 and 2
TRUTH TABLE
Mode
Standby
Read
Write
CE
H
L
L
WE
x
H
L
I/O
High Z
D
OUT
High Z
Power
Standby
Active
Active
Figure 1. Output Load
* including scope and test fixture.
note:
Because of the ultra-high speed of the P4C107, care must be taken when
testing this device; an inadequate setup can cause a normal function-
ing part to be rejected as faulty. Long high-inductance leads that cause
supply bounce must be avoided by bringing the V
CC
and ground planes
directly up to the contactor fingers. A 0.01 µF high frequency capacitor
Figure 2. Thevenin Equivalent
is also required between V
CC
and ground. To avoid signal reflections,
proper termination must be used; for example, a 50Ω test environment
should be terminated into a 50Ω load with 1.73V (Thevenin Voltage) at
the comparator input, and a 116Ω resistor must be used in series with
D
OUT
to match 166Ω (Thevenin Resistance).
Notes:
10.
CE
and
WE
must be LOW for WRITE cycle.
11.
OE
is LOW for this WRITE cycle to show t
WZ
and t
OW
.
12. If
CE
goes HIGH simultaneously with
WE
HIGH, the output remains
in a high impedance state
13. Write Cycle Time is measured from the last valid address to the first
transitioning address.
Document #
SRAM139
REV OR
Page 5
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参数对比
与P4C107-20J4I相近的元器件有：P4C107、P4C107-10J4C、P4C107-10J4I、P4C107-12J4C、P4C107-12J4I、P4C107-15J4C、P4C107-15J4I、P4C107-20J4C。描述及对比如下：
型号 P4C107-20J4I P4C107 P4C107-10J4C P4C107-10J4I P4C107-12J4C P4C107-12J4I P4C107-15J4C P4C107-15J4I P4C107-20J4C
描述 ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM ULTRA HIGH SPEED 1M x 1 STATIC CMOS RAM
是否无铅 含铅 - 含铅 含铅 含铅 含铅 含铅 含铅 含铅
是否Rohs认证 不符合 - 不符合 不符合 不符合 不符合 不符合 不符合 不符合
厂商名称 Pyramid Semiconductor Corporation - Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation - Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation
零件包装代码 SOJ - SOJ SOJ SOJ SOJ SOJ SOJ SOJ
包装说明 SOJ, - SOJ, 0.400 INCH, PLASTIC, SOJ-28 SOJ, 0.400 INCH, PLASTIC, SOJ-28 SOJ, 0.400 INCH, PLASTIC, SOJ-28 0.400 INCH, PLASTIC, SOJ-28
针数 28 - 28 28 28 28 28 28 28
Reach Compliance Code compli - compli compli compli compli compli compli compli
ECCN代码 3A991.B.2.B - 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B
最长访问时间 20 ns - 10 ns 10 ns 12 ns 12 ns 15 ns 15 ns 20 ns
JESD-30 代码 R-PDSO-J28 - R-PDSO-J28 R-PDSO-J28 R-PDSO-J28 R-PDSO-J28 R-PDSO-J28 R-PDSO-J28 R-PDSO-J28
JESD-609代码 e0 - e0 e0 e0 e0 e0 e0 e0
长度 18.415 mm - 18.415 mm 18.415 mm 18.415 mm 18.415 mm 18.415 mm 18.415 mm 18.415 mm
内存密度 1048576 bi - 1048576 bi 1048576 bi 1048576 bi 1048576 bi 1048576 bi 1048576 bi 1048576 bi
内存集成电路类型 STANDARD SRAM - STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM
内存宽度 1 - 1 1 1 1 1 1 1
功能数量 1 - 1 1 1 1 1 1 1
端子数量 28 - 28 28 28 28 28 28 28
字数 1048576 words - 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words
字数代码 1000000 - 1000000 1000000 1000000 1000000 1000000 1000000 1000000
工作模式 ASYNCHRONOUS - ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
最高工作温度 85 °C - 70 °C 85 °C 70 °C 85 °C 70 °C 85 °C 70 °C
组织 1MX1 - 1MX1 1MX1 1MX1 1MX1 1MX1 1MX1 1MX1
封装主体材料 PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOJ - SOJ SOJ SOJ SOJ SOJ SOJ SOJ
封装形状 RECTANGULAR - RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE - SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
并行/串行 PARALLEL - PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
峰值回流温度（摄氏度） NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
认证状态 Not Qualified - Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 3.7592 mm - 3.7592 mm 3.7592 mm 3.7592 mm 3.7592 mm 3.7592 mm 3.7592 mm 3.7592 mm
最大供电电压 (Vsup) 5.5 V - 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V - 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V - 5 V 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES - YES YES YES YES YES YES YES
技术 CMOS - CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL - COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL
端子面层 TIN LEAD - TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD
端子形式 J BEND - J BEND J BEND J BEND J BEND J BEND J BEND J BEND
端子节距 1.27 mm - 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
端子位置 DUAL - DUAL DUAL DUAL DUAL DUAL DUAL DUAL
处于峰值回流温度下的最长时间 NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
宽度 10.16 mm - 10.16 mm 10.16 mm 10.16 mm 10.16 mm 10.16 mm 10.16 mm 10.16 mm
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器件捷径:
S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY
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