P89LPC980/982/983/985
8-bit microcontroller with accelerated two-clock 80C51 core,
4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC
Rev. 02 — 8 February 2010
Preliminary data sheet
1. General description
The P89LPC980/982/983/985 is a single-chip microcontroller, available in low cost
packages, based on a high performance processor architecture that executes instructions
in two to four clocks, six times the rate of standard 80C51 devices. Many system-level
functions have been incorporated into the P89LPC980/982/983/985 in order to reduce
component count, board space, and system cost.
2. Features
2.1 Principal features
4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte
pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
256-byte RAM data memory. Both the P89LPC982 and the P89LPC985 also include a
256-byte auxiliary on-chip RAM.
8-input multiplexed 10-bit ADC (P89LPC985, 4-input multiplexed 10-bit ADC on
P89LPC983) with window comparator that can generate an interrupt for in or out of
range results. Two analog comparators with selectable inputs and reference source.
Five 16-bit counter/timers (each may be configured to toggle a port output upon timer
overflow or to become a PWM output).
A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit
prescaler and a programmable and readable 16-bit timer.
Enhanced UART with a fractional baud rate generator, break detect, framing error
detection, and automatic address detection; 400 kHz byte-wide I
2
C-bus
communication port and SPI communication port.
High-accuracy internal RC oscillator option 7.373 MHz calibrated to
±1
%, with clock
doubler option, allows operation without external oscillator components. The RC
oscillator option is selectable and fine tunable.
Watchdog timer with separate on-chip oscillator, nominal 400 kHz/25 kHz, calibrated to
±10
% at 400 kHz, requiring no external components. The watchdog prescaler is
selectable from eight values.
Pin remap for UART, I
2
C and SPI.
2.4 V to 5.5 V V
DD
operating range.
Enhanced low voltage (brownout) detect allows a graceful system shutdown when
power fails.
28-pin TSSOP and PLCC packages with 23 I/O pins minimum and up to 26 I/O pins
while using on-chip oscillator and reset options.
NXP Semiconductors
P89LPC980/982/983/985
8-bit microcontroller with accelerated two-clock 80C51 core
2.2 Additional features
A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
for all instructions except multiply and divide when executing at 18 MHz. This is six
times the performance of the standard 80C51 running at the same clock frequency. A
lower clock frequency for the same performance results in power savings and reduced
EMI.
Serial flash In-Circuit Programming (ICP) allows simple production coding with
commercial EPROM programmers. Flash security bits prevent reading of sensitive
application programs.
Serial flash In-System Programming (ISP) allows coding while the device is mounted
in the end application.
In-Application Programming (IAP) of the flash code memory. This allows changing the
code in a running application.
Clock switching on the fly among internal RC oscillator, watchdog oscillator, external
clock source provides optimal support of minimal power active mode with fast
switching to maximum performance.
Idle and two different power-down reduced power modes. Improved wake-up from
Power-down mode (a LOW interrupt input starts execution). Typical power-down
current is 1
μA
(total power-down with voltage comparators disabled).
Integrated PMU (Power Management Unit) automatically adjusts internal regulators to
minimize power consumption during Idle mode, Power-down mode and Total
power-down mode. In addition, the power consumption can be further reduced in
normal or Idle mode through configuring regulators modes according to the
applications.
Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A software reset function is also available.
Configurable on-chip oscillator with frequency range options selected by user
programmed flash configuration bits. Oscillator options support frequencies from
20 kHz to the maximum operating frequency of 18 MHz.
Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
Programmable port output configuration options: quasi-bidirectional, open drain,
push-pull, input-only.
High current sourcing/sinking (20 mA) on eight I/O pins (P0.3 to P0.7, P1.4, P1.6,
P1.7). All other port pins have high sinking capability (20 mA). A maximum limit is
specified for the entire chip.
Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
Only power and ground connections are required to operate the
P89LPC980/982/983/985 when internal reset option is selected.
Four interrupt priority levels.
Eight keypad interrupt inputs, plus two additional external interrupt inputs.
Schmitt trigger port inputs.
Second data pointer.
Emulation support.
P89LPC980_982_983_985_2
© NXP B.V. 2010. All rights reserved.
Preliminary data sheet
Rev. 02 — 8 February 2010
2 of 85
NXP Semiconductors
P89LPC980/982/983/985
8-bit microcontroller with accelerated two-clock 80C51 core
3. Ordering information
Table 1.
Ordering information
Package
Name
P89LPC980FDH
P89LPC982FA
P89LPC982FDH
P89LPC983FDH
P89LPC985FA
P89LPC985FDH
TSSOP28
PLCC28
TSSOP28
TSSOP28
PLCC28
TSSOP28
Description
plastic thin shrink small outline package; 28
leads; body width 4.4 mm
plastic leaded chip carrier; 28 leads
plastic thin shrink small outline package; 28
leads; body width 4.4 mm
plastic thin shrink small outline package; 28
leads; body width 4.4 mm
plastic leaded chip carrier; 28 leads
plastic thin shrink small outline package; 28
leads; body width 4.4 mm
Version
SOT361-1
SOT261-2
SOT361-1
SOT361-1
SOT261-2
SOT361-1
Type number
3.1 Ordering options
Table 2.
Ordering options
Flash memory
4 kB
8 kB
8 kB
4 kB
8 kB
8 kB
Temperature range
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
Frequency
0 MHz to 18 MHz
0 MHz to 18 MHz
0 MHz to 18 MHz
0 MHz to 18 MHz
0 MHz to 18 MHz
0 MHz to 18 MHz
Type number
P89LPC980FDH
P89LPC982FA
P89LPC982FDH
P89LPC983FDH
P89LPC985FA
P89LPC985FDH
P89LPC980_982_983_985_2
© NXP B.V. 2010. All rights reserved.
Preliminary data sheet
Rev. 02 — 8 February 2010
3 of 85
NXP Semiconductors
P89LPC980/982/983/985
8-bit microcontroller with accelerated two-clock 80C51 core
4. Block diagram
P89LPC980/982
ACCELERATED 2-CLOCK 80C51 CPU
8 kB/4 kB
CODE FLASH
256-BYTE
DATA RAM
256-BYTE
AUXILIARY RAM
(P89LPC982)
P3[1:0]
PORT 3
CONFIGURABLE I/Os
PORT 2
CONFIGURABLE I/Os
PORT 1
CONFIGURABLE I/Os
PORT 0
CONFIGURABLE I/Os
UART
internal bus
I
2
C-BUS
TXD
RXD
SCL
SDA
SPICLK
MOSI
MISO
SS
SPI
REAL-TIME CLOCK/
SYSTEM TIMER
TIMER 0
TIMER 1
T0
T1
T2
T2EX
T3
T3EX
T4
T4EX
CMP2
CIN2B
CIN2A
CMP1
CIN1A
CIN1B
P2[7:0]
P1[7:0]
P0[7:0]
TIMER 2
TIMER 3
TIMER 4
KEYPAD
INTERRUPT
WATCHDOG TIMER
AND OSCILLATOR
ANALOG
COMPARATORS
PROGRAMMABLE
OSCILLATOR DIVIDER
CPU
clock
XTAL1
CRYSTAL
OR
RESONATOR XTAL2
CONFIGURABLE
OSCILLATOR
ON-CHIP RC
OSCILLATOR
WITH CLOCK
DOUBLER
POWER MANAGEMENT
(POWER-ON RESET,
BROWNOUT RESET,
REGULATORS)
002aae532
Fig 1.
P89LPC980/982 block diagram
P89LPC980_982_983_985_2
© NXP B.V. 2010. All rights reserved.
Preliminary data sheet
Rev. 02 — 8 February 2010
4 of 85
NXP Semiconductors
P89LPC980/982/983/985
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC983/985
ACCELERATED 2-CLOCK 80C51 CPU
8 kB/4 kB
CODE FLASH
256-BYTE
DATA RAM
256-BYTE
AUXILIARY RAM
(P89LPC985)
P3[1:0]
PORT 3
CONFIGURABLE I/Os
PORT 2
CONFIGURABLE I/Os
PORT 1
CONFIGURABLE I/Os
PORT 0
CONFIGURABLE I/Os
UART
internal bus
I
2
C-BUS
TXD
RXD
SCL
SDA
SPICLK
MOSI
MISO
SS
SPI
REAL-TIME CLOCK/
SYSTEM TIMER
TIMER 0
TIMER 1
T0
T1
T2
T2EX
T3
T3EX
T4
T4EX
CMP2
CIN2B
CIN2A
CMP1
CIN1A
CIN1B
AD00
AD01
AD02
AD03
AD04
(1)
AD05
(1)
AD06
(1)
AD07
(1)
P2[7:0]
P1[7:0]
P0[7:0]
TIMER 2
TIMER 3
TIMER 4
KEYPAD
INTERRUPT
WATCHDOG TIMER
AND OSCILLATOR
ANALOG
COMPARATORS
PROGRAMMABLE
OSCILLATOR DIVIDER
CPU
clock
10-BIT ADC
XTAL1
CRYSTAL
OR
RESONATOR XTAL2
CONFIGURABLE
OSCILLATOR
ON-CHIP RC
OSCILLATOR
WITH CLOCK
DOUBLER
POWER MANAGEMENT
(POWER-ON RESET,
BROWNOUT RESET,
REGULATORS)
002aae533
(1) Only on the P89LPC985.
Fig 2.
P89LPC983/985 block diagram
P89LPC980_982_983_985_2
© NXP B.V. 2010. All rights reserved.
Preliminary data sheet
Rev. 02 — 8 February 2010
5 of 85
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