CALIFORNIA MICRO DEVICES
PACRG
P/Active High Performance GTL/ECL Local Termination Network
Features
• Designed especially for Pentium Pro and RISC-
based computers/servers
• Provides high speed bus termination
• Reduces ground bounce with center ground
pin placement
• Terminates 22 lines in a QSOP package
• Saves board space and reduces assembly cost
Product Description
CAMD’s P/Active RG GTL+ Local Bus Terminator is ideal
for Pentium Pro and related high speed bus termination
applications where a resistor approach is deemed suitable.
This device also meets the high-speed bus termination
demands of microprocessors like Motorola’s PowerPC,
DEC’s Alpha, Sun’s SPARC, and SGI’s MIPs processor, as
well as other high performance RISC processors for
embedded control applications.
The PACRG offers 22 terminations per package and meets
all related Intel specifications for Pentium Pro termination
requirements. Four popular values are available for a
variety of bus termination applications and line impedance
requirements: 47, 50, 56 and 68 ohms.
The P/Active RG Termination Networks provide high
performance, high reliability, and low cost through manu-
facturing efficiency. The termination resistor elements are
fabricated using proprietary state-of-the-art thin film
technology. CAMD’s highly integrated solution is silicon-
based and has the same enhanced reliability characteris-
tics as today’s microprocessor products. The thin film
resistors have very high stability over a wide temperature
range, over applied voltage, and over life. In addition, the
QSOP industry standard packaging is manufacturing-
friendly and yields the high reliability of other semiconduc-
tor components. The P/Active RG Pentium Pro Termination
Network provides a complete 300 point termination
solution in only 14 QSOP packages.
Refer to AP-201 Termination Application Note and AP-203 GTL+
Termination Application Note for further information.
Applications
• Pentium Pro servers
• Pentium Pro desk top systems
• GTL, ECL terminator for embedded
processor busses
S TA N D A R D S P E C I F I C AT I O N S
Absolute Tolerance (R)
Operating Temperature Range
Power Rating/Resistor
Storage Temperature
Package Power Rating
±5%
0°C to 70°C
100mW
–65°C to 150°C
1.00w, Max
R
T
24 23
R
T
22
PIN DIAGRAM
21 20 19
18 17 16 15
14
13
S TA N D A R D VA L U E S
R (
Ω
)
47
50
56
68
Code
470
500
560
680
1
2
3
4
5
6
7
8
9
10
11 12
S TA N D A R D PA R T O R D E R I N G I N F O R M AT I O N
Package
R Code
470(1%)
500(1%)
560(1%)
680(1%)
Pins
24
24
24
24
Style
QSOP
QSOP
QSOP
QSOP
Ordering Part Number
Tubes
PAC470RGQ/T
PAC500RGQ/T
PAC560RGQ/T
PAC680RGQ/T
Tape & Reel
PAC470RGQ/R
PAC500RGQ/R
PAC560RGQ/R
PAC680RGQ/R
Part Marking
PAC470RGQ
PAC500RGQ
PAC560RGQ
PAC680RGQ
+ ' "
© 2000 California Micro Devices Corp. All rights reserved.
8/10/2000
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
1
CALIFORNIA MICRO DEVICES
Signal at Termination and Victim Line (TA=25
O
C) (See Test Circuit)
PACRG
Channel 1 (500mV/division) Termination Signal, Channel 2 (250mV/division) Victim Voltage. The victim voltage
crosstalk measures 65mV in the critical areas around the system clock. The system clock occurs approximately 4ns
before each data transition. The horizontal dashed lines are 65mV apart. The time scale is 5.0ns/division. The signal
voltage rise and fall times have been adjusted at the driver to conform to Intel specifications.) Measurements made
using Tektronix TDS820 6 GHz Digitizing Oscilloscope with P6207 FET Probes.
Cha
500mV/De
Cha
250mV/De
Test Circuit Block Diagram
©2000 California Micro Devices Corp. All rights reserved.
2
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
8/10/2000
CALIFORNIA MICRO DEVICES
PACRG
Test Circuit
TP1
TP1
PB1
GND
JP1
1
2
3
4
5
6
7
8
POWER
GND
GND
VCC_5
GND
VCC_3
GND
VCC_1.5
GND
GND
VCC_5
W1
SMA
PULSE_GEN
2
4
6
8
11
13
15
17
1
19
U2
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1G
2G
74FCT244
GND
GND
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
18
16
14
12
9
7
5
3
BUFFER1
VCC_3
VCC_1.5
BUFFER1
GND
RIN1
100
RIN2
100
GND
GATE1
GATE2
GATE3
GATE4
TP4
PB4
TP4
GND
VCC_5
C17
GND
U1
VCC_5
1
2
3
5
6
7
8
9
10
12
13
14
15
16
17
19
20
21
22
23
24
26
27
28
/OEAB
LEAB
A1
/CEAB
CLKAB
B1
56
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
35
34
33
31
30
29
0.1uF
GND
VCC_1.5
GND
VCC_1.5
C8
0.1uF
GND
GND
GND
VCC_3
R3
1K
GATE1
VREF
GND
C9
0.1uF
A2
A3
VCC_3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
VCC_3
A16
A17
CLKIN
/OEBA
LEBA
74GTL16616
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
VREF
B16
B17
CLKOUT
CLKBA
/CEBA
R1
GTL1
GTL2
GTL3
GTL4
GTL5
GTL6
GTL7
GTL8
GTL9
GTL10
GTL11
GTL_TEST
VREF
VICTIM
56
C15
1000pF
C16
0.1uF
GATE2
C24
1000pF
C25
0.1uF
R4
2K
GND
GATE3
GND
GND
GND
VCC_3
VCC_3
GATE4
GND
C10
0.1uF
GND
C13
1000pF
C14
0.1uF
VCC_5
GND
C11
0.1uF
GND
VCC_5
GND
GND
GND
C12
0.1uF
GND
TP5
PB5
VICTIM
VCC_1.5
GND
U3
R2
GTL1
1
2
3
4
5
6
7
8
9
10
11
12
R
R
R
R
R
G
R
R
R
R
R
R
PRN331A
TP3
PB3
TP3
R
R
R
R
R
G
R
R
R
R
R
R
24
23
22
21
20
19
18
17
16
15
14
13
GTL11
GTL11
GTL10
GTL10
GTL9
56
C18
1000pF
C19
0.1uF
GTL2
GTL2
GTL3
VTT
GTL3
GTL4
GTL4
GTL5
GTL5
GTL6
VTT
GTL9
GTL8
GTL8
GTL7
GTL7
GTL6
VCC_1.5
GND
C20
1000pF
C21
0.1uF
C22
1000pF
C23
0.1uF
GND
GND
GND
© 2000 California Micro Devices Corp. All rights reserved.
8/10/2000
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
3
