PACDN2404C/2408C/2416C
ESD Protection Arrays, Chip Scale Package
Features
•
•
4, 8, or 16 transient voltage suppressors in a single
package
In-system Electrostatic Discharge (ESD) protection
to +18kV contact discharge per IEC 61000-4-2
international standard
Supports AC signal applications
Compact Chip Scale Package (0.65mm pitch) for-
mat saves board space and eases layout in space
critical applications compared to discrete solutions
and traditional wire bonded packages
Lead-free versions available
Product Description
The PACDN2404C, PACDN2408C and PACDN2416C
are transient voltage suppressor arrays that provide a
very high level of protection for sensitive electronic
components that may be subjected to ESD. The back-
to-back Zener connections provide ESD protection in
cases where nodes with AC signals are present.
These devices are designed and characterized to
safely dissipate ESD strikes at levels well beyond the
maximum requirements set forth in the IEC 61000-4-2
international standard (Level 4, +8kV contact dis-
charge). All I/Os are rated at +18kV using the IEC
61000-4-2 contact discharge method. Using the MIL-
STD-883D (Method 3015) specification for Human
Body Model (HBM) ESD, all pins are protected for con-
tact discharges to greater than +30kV.
The Chip Scale Package format of these devices
enable extremely small footprints that are necessary in
portable electronics such as cellular phones, PDAs,
internet appliances and PCs. The large solder bumps
allow for standard attachment to laminate boards with-
out the use of underfill. The PACDN2404C,
PACDN2408C and PACDN2416C are available with
optional lead-free finishing.
•
•
•
Applications
•
•
•
•
•
•
•
•
ESD protection for sensitive electronic equipment
I/O port, keypad and button circuitry protection for
portable devices
Wireless Handsets
Handheld PCs / PDAs
MP3 Players
Digital Cameras and Camcorders
Notebooks
Desktop PCs
Electrical Schematic
B1
B2
B3
B1
B2
B4
B5
D1
D2
D3
D4
D5
A1
A2
A3
A1
A2
A3
A4
A5
C1
C2
C3
C4
C5
PACDN2404C
PACDN2408C
B1
B2
B3
B4
B5
A1
A2
A3
A4
A5
PACDN2416C
© 2003 California Micro Devices Corp. All rights reserved.
10/10/03
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
1
PACDN2404C/2408C/2416C
PACKAGE / PINOUT DIAGRAMS
TOP VIEW
(Bumps Down View)
Orientation
Marking
(see note 2)
BOTTOM VIEW
(Bumps Up View)
1
A
B
2
3
B1
A1
B2
A2
B3
A3
D24
PACDN2404C
CSP Package
TOP VIEW
(Bumps Down View)
BOTTOM VIEW
(Bumps Up View)
Orientation
Marking
(see note 2)
1
A
B
2
3
4
5
B1
A1
B2
A2
B3
A3
B4
A4
B5
A5
DN2408
TOP VIEW
(Bumps Down View)
PACDN2408C
CSP Package
5
D1
BOTTOM VIEW
(Bumps Up View)
Orientation
Marking
(see note 2)
1
A
B
C
D
2
3
4
D2
C2
B2
A2
D3
C3
B3
A3
D4
C4
B4
A4
D5
C5
B5
A5
DN
2416
PACDN2416C
C1
B1
A1
CSP Package
Notes:
1) These drawings are not to scale.
2) Lead-free devices are specified by using a "+" character for the top side orientation mark.
Ordering Information
PART NUMBERING INFORMATION
Standard Finish
Ordering Part
Bumps
6
10
20
Package
CSP
CSP
CSP
Number
1
PACDN2404C
PACDN2408C
PACDN2416C
Part Marking
D24
DN2408
DN2416
Lead-free Finish
2
Ordering Part
Number
1
PACDN2404CG
PACDN2408CG
PACDN2416CG
Part Marking
D24
DN2408
DN2416
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Note 2: Lead-free devices are specified by using a "
+
" character for the top side orientation mark
© 2003 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
10/10/03
PACDN2404C/2408C/2416C
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Storage Temperature Range
RATING
-65 to +150
UNITS
°C
STANDARD OPERATING CONDITIONS
PARAMETER
Operating Temperature Range
RATING
-40 to +85
UNITS
°C
ELECTRICAL OPERATING CHARACTERISTICS
1
SYMBOL
V
REV
I
LEAK
V
SIG
PARAMETER
Reverse Standoff Voltage
Leakage Current
Signal Clamp Voltage
Positive Clamp
Negative Clamp
In-system ESD Withstand Voltage
a) Human Body Model, MIL-STD-883,
Method 3015
b) Contact Discharge per IEC 61000-4-2
Level 4
Clamping Voltage during ESD Discharge
MIL-STD-883 (Method 3015), 8kV
Positive Transients
Negative Transients
Channel Capacitance
CONDITIONS
I
DIODE
=10µA
V
IN
=3.3V DC
I
LOAD
= 10mA
6.0
-9.2
Notes 2 & 3
+30
+18
Notes 2 & 3
+14
-14
At 2.5V DC,
f
= 1MHz
39
47
V
V
pF
kV
kV
7.6
-7.6
9.2
-6.0
V
V
MIN
5.9
100
TYP
MAX
UNITS
V
nA
V
ESD
V
CL
C
Note 1: T
A
=25
°
C unless otherwise specified. GND in this document refers to the lower supply voltage.
Note 2: ESD applied to channel pins with respect to GND, one at a time. All other channels are open. All GND pins tied to ground.
Note 3: These parameters are guaranteed by design and characterization.
© 2003 California Micro Devices Corp. All rights reserved.
10/10/03
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
3
PACDN2404C/2408C/2416C
Application Information
Refer to Application Note AP-217, "The Chip Scale
Package", for a detailed description of Chip Scale
Packages offered by California Micro Devices.
PRINTED CIRCUIT BOARD RECOMMENDATIONS
PARAMETER
Pad Size on PCB
Pad Shape
Pad Definition
Solder Mask Opening
Solder Stencil Thickness
Solder Stencil Aperture Opening (laser cut, 5% tapered walls)
Solder Flux Ratio
Solder Paste Type
Pad Protective Finish
Tolerance — Edge To Corner Ball
Solder Ball Side Coplanarity
Maximum Dwell Time Above Liquidous
Soldering Maximum Temperature
VALUE
0.300mm
Round
Non-Solder Mask defined pads
0.350mm Round
0.125 - 0.150mm
0.360mm Round
50/50 by volume
No Clean
OSP (Entek Cu Plus 106A)
+50µm
+20µm
60 seconds
260°C
Non-Solder Mask Defined Pad
0.300mm DIA.
Solder Stencil Opening
0.360mm DIA.
Solder Mask Opening
0.350mm DIA.
Figure 1. Recommended Non-Solder Mask Defined Pad Illustration
250
Temperature (°C)
200
150
100
50
0
1:00.0
2:00.0
3:00.0
Time (minutes)
4:00.0
Figure 2. Eutectic (SnPb) Solder
Ball Reflow Profile
© 2003 California Micro Devices Corp. All rights reserved.
Figure 3. Lead-free (SnAgCu) Solder
Ball Reflow Profile
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
10/10/03
PACDN2404C/2408C/2416C
Mechanical Details
The PACDN2404C/2408C/2416C devices are pack-
aged in custom Chip Scale Packages (CSP).
PACDN2404C 6-bump CSP Mechanical Specifications
The PACDN2404C devices are packaged in a 6-bump
custom Chip Scale Package (CSP). Dimensions are
presented below.
Mechanical Package Diagrams
BOTTOM VIEW
A1
C1
B1
B3
B2
PACKAGE DIMENSIONS
Package
Bumps
Dim
A1
A2
B1
B2
B3
C1
C2
D1
D2
Millimeters
Min
1.109
1.759
0.645
0.645
0.645
0.202
0.202
0.600
0.356
Nom
1.154
1.804
0.650
0.650
0.650
0.252
0.252
0.644
0.381
Max
1.199
1.849
0.655
0.655
0.655
0.302
0.302
0.687
0.406
Min
Custom CSP
6
Inches
Nom
Max
0.0437 0.0454 0.0472
0.0693 0.0710 0.0728
0.0254 0.0256 0.0258
0.0254 0.0256 0.0258
0.0254 0.0256 0.0258
0.0080 0.0099 0.0119
0.0080 0.0099 0.0119
0.0236 0.0253 0.0271
0.0140 0.0150 0.0160
3500 pieces
SIDE
VIEW
3
A2
2
1
B
A
C2
D1
D2
0.35 DIA.
63/37 Sn/Pb (Eutectic) or
96.8/2.6/0.6 Sn/Ag/Cu (Lead-free)
SOLDER BUMPS
DIMENSIONS IN MILLIMETERS
# per tape and
reel
Package Dimensions for
PACDN2404C 6-bump Chip Scale Package
Controlling dimension: millimeters
CSP Tape and Reel Specifications
POCKET SIZE (mm)
B
0
X A
0
X K
0
1.98 X 1.32 X 0.91
P
o
Top
Cover
Tape
PART NUMBER
PACDN2404C
CHIP SIZE (mm)
1.804 X 1.154 X 0.644
TAPE WIDTH
W
8mm
REEL
DIA.
178mm (7")
QTY
PER
REEL
3500
P
0
4mm
P
1
4mm
10 Pitches Cumulative
Tolerance On Tape
±
0.2 mm
A
o
W
K
o
B
o
For tape feeder reference
only including draft.
Concentric around B.
Embossment
P
1
User Direction of Feed
Center Lines
of Cavity
Figure 4. Tape and Reel Mechanical Data
© 2003 California Micro Devices Corp. All rights reserved.
10/10/03
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
5
