THYRISTOR MODULE
200A / 1200V to 1600V
PAT20012 PAT20016
PAH20012 PAH20016
FEATURES
* Isolated Base
* Dual Thyristors or Thyristor and Diode
Anti-Parallel Circuit
* High Surge Capability
* UL Recognized, File No. E187184
OUTLINE DRAWING
PAT
TYPICAL APPLICATIONS
* Rectified For General Use
PAH
Maximum Ratings
Parameter
Repetitive Peak Off-State Voltage
Non Repetitive Peak Off-State Voltage
Repetitive Peak Reverse Voltage
Non Repetitive Peak Reverse Voltage
Approx Net Weight:500g
Symbol
V
DRM
V
DSM
V
RRM
V
RSM
Grade
PAT/PAH20012
PAT/PAH20016
Unit
V
V
1200
1300
1200
1300
1600
1700
1600
1700
Max Rated
Value
Parameter
Average Rectified Output Current
RMS On-State Current
Surge On-State Current
I Squared t
Critical Rate of Turned-On Current
Peak Gate Power
Average Gate Power
Peak Gate Current
Peak Gate Voltage
Peak Gate Reverse Voltage
Operating JunctionTemperature Range
Storage Temperature Range
Isoration Voltage
Case mounting
Mounting torque
Terminals
Value per 1 Arm
I
O(AV)
I
T(RMS)
I
TSM
I
2
t
di/dt
P
GM
P
G(AV)
I
GM
V
GM
V
RGM
Tjw
Tstg
Viso
Ftor
Conditions
50Hz Half Sine Wave condition
Tc=75°C
50 Hz Half Sine Wave,1Pulse
Non-Repetitive
2msec to 10msec
V
D
=2/3V
DRM
, I
TM
=2 I
O
, Tj=125°C
I
G
=300mA, di
G
/dt=0.2A/µs
•
Unit
A
A
A
A
2
s
A/µs
200
314
4000
80000
100
5
W
1
W
2
A
10
V
5
V
-40 to +125
°C
-40 to +125
°C
Base Plate to Terminals, AC1min
2500
V
M6 Screw
2.5 to 3.5
N
•
m
M8 Screw
9.0 to 10.0
Electrical
•
Thermal Characteristics
Characteristics
Peak Off-State Current
Peak Reverse Current
Peak Forward Voltage
Gate Current to Trigger
Symbol
I
DM
I
RM
V
TM
I
GT
Test Conditions
V
DM
= V
DRM,
Tj= 125°C
V
RM
= V
RRM,
Tj= 125°C
I
TM
= 600A, Tj=25°C
Tj=-40°C
V
D
=6V,I
T
=1A
Tj=25°C
Tj=125°C
Tj=-40°C
V
D
=6V,I
T
=1A
Tj=25°C
Tj=125°C
V
D
=2/3V
DRM
Tj=125°C
V
D
=2/3V
DRM
Tj=125°C
I
TM
=I
O
,V
D
=2/3V
DRM
dv/dt=20V/µs, V
R
=100V
-di/dt=20A/µs, Tj=125°C
V
D
=2/3V
DRM
Tj=125°C
I
G
=300mA, di
G
/dt=0.2A/µs
Maximum Value.
Min. Typ. Max.
80
80
1.28
300
150
80
5
3
2
0.25
500
100
6
2
4
150
100
0.2
0.1
Unit
mA
mA
V
mA
Gate Voltage to Trigger
Gate Non-Trigger Voltage
Critical Rate of Rise of Off-State
Voltage
Turn-Off Time
Turn-On Time
Delay Time
Rise Time
Latching Current
Holding Current
Thermal Resistance
Value Per 1Arm
V
GT
V
GD
dv/dt
tq
tgt
td
tr
I
L
I
H
Rth(j-c)
V
V
V/µs
µs
µs
µs
µs
mA
Tj=25°C
Tj=25°C
Junction to Case
Base Plate to Heat Sink
Rth(c-f)
with Thermal Compound
°C/W
PAT/PAH2001x OUTLINE DRAWING (Dimensions in mm)
PAT
PAH
